- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370429 > HB28D032MM2 (Hitachi,Ltd.) MultiMediaCard 16 Mbyte/32 Mbyte/64 Mbyte/128 MByte PDF資料下載
參數(shù)資料
| 型號： | HB28D032MM2 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | MultiMediaCard 16 Mbyte/32 Mbyte/64 Mbyte/128 MByte |
| 中文描述： | 多媒體16 Mbyte/32 Mbyte/64 Mbyte/128字節(jié) |
| 文件頁數(shù)： | 51/88頁 |
| 文件大?。?/td> | 329K |
| 代理商： | HB28D032MM2 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁當前第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁
HB28E016/D032/D064/B128MM2
51
Stream read
The data transfer starts N
AC
clock cycles after the end bit of the host command. The bus transaction is
identical to that of a read block command (refer to Figure “Data Read Timing”). As the data transfer is not
block-oriented, the data stream does not include the CRC checksum. Consequently the host can not check
for data validity. The data stream is terminated by a stop command. The corresponding bus transaction is
identical to the stop command for the multiple read block (refer to Figure “Timing of Stop Command”).
Single or multiple block write
The host selects one card for data write operation by CMD7. The host sets the valid block length for block-
oriented data transfer by CMD16. The host transfers the data with CMD24. The address of the data block
is determined by the argument of this command. This command is responded by the card on the CMD line
as usual. The data transfer from the host starts N
WR
clock cycles after the card response was received. The
write data have CRC check bits to allow the card to check the transferred data for transmission errors. The
card sends the CRC check information as a CRC status to the host (on the data line). The CRC status
contains the information if the write data transfer was non-erroneous (the CRC check did not fail) or not.
In the case of transmission error the card sends a negative CRC status (“101” bin) which forces the host to
retransmit the data. In the case of non-erroneous transmission the card sends a positive CRC status (“010”
bin) and starts the data programming procedure.
S T content CRC E
CMD
DAT
CMD
DAT
Z Z Z
* * * *
* * * *
Z
Z Z S
E S
E
status
busy = 'L'
Z
Z
Z Z Z Z Z Z
Z Z Z Z
CRC E
content
L ... pull down to LOW bit
Host command
N
CR
S T content CRC E
S
Z P
Card response
content
N
WR
Write data
CRC status
Card busy
Z
Host active
Card active
Host active
Host active
Card active
Write data
Timing of The Block Write Command
f the card does not have any more free data receive buffer, the card indicates it by pulling down the data
line to LOW. The card stops pulling down the data line as soon as at least one receive buffer for the
defined data transfer block length becomes free. This signaling does not give any information about the
data write status. This information has to be polled by the status polling command.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HB28D064MM2 | MultiMediaCard 16 Mbyte/32 Mbyte/64 Mbyte/128 MByte |
| HB28E016MM2 | MultiMediaCard 16 Mbyte/32 Mbyte/64 Mbyte/128 MByte |
| HB28C048A6 | FLASH ATA Card |
| HB28C048C6 | CompactFlash⑩ |
| HB28C016A6 | FLASH ATA Card |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HB2A102K-S265B | 制造商:Hitano Enterprise Corp 功能描述:Bulk |
| HB2A102K-S565B | 制造商:Hitano Enterprise Corp 功能描述:Bulk |
| HB2A103K-S565B | 制造商:Hitano Enterprise Corp 功能描述: |
| HB2A122K-S265B | 制造商:Hitano Enterprise Corp 功能描述: |
| HB2A122K-S565B | 制造商:Hitano Enterprise Corp 功能描述:Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復。