參數(shù)資料
型號: HAL300SO
廠商: MICRONAS SEMICONDUCTOR HOLDING AG
英文描述: Differential Hall Effect Sensor IC
中文描述: 差分霍爾效應傳感器IC
文件頁數(shù): 11/17頁
文件大?。?/td> 131K
代理商: HAL300SO
HAL300
11
Micronas
20
22
24
26
28
30
μ
A
102
V
OH
I
OH
V
100
10
1
10
2
10
3
10
4
10
5
101
V
DD
= 5 V
T
A
= 125
°
C
T
A
= 75
°
C
T
A
= 25
°
C
Fig. 20:
Typical output leakage current
versus output voltage
Application Notes
Mechanical stress can change the sensitivity of the Hall
plates and an offset of the magnetic switching points
may result. External mechanical stress to the package
can influence the magnetic parameters if the sensor is
used under back-biased applications. This piezo sensi-
tivity of the sensor IC cannot be completely compen-
sated for by the switching offset compensation tech-
nique.
For back-biased applications, the HAL320 is recom-
mended. In such cases, please contact our Application
Department. They will provide assistance in avoiding
applications which may induce stress to the ICs. This
stress may cause drifts of the magnetic parameters indi-
cated in this data sheet.
For electromagnetic immunity, it is recommended to ap-
ply a 4.7 nF capacitor between V
DD
(pin 1) and Ground
(pin 2). For automotive applications, a 220 series re-
sistor to pin 1 is recommended. Because of the I
DD
peak
at 4.1 V, the series resistor should not be greater than
270
. The series resistor and the capacitor should be
placed as close as possible to the IC.
Ambient Temperature
Due to the internal power dissipation, the temperature
on the silicon chip (junction temperature T
J
) is higher
than the temperature outside the package (ambient tem-
perature T
A
).
T
J
= T
A
+
T
At static conditions, the following equations are valid:
for SOT-89A:
T = I
DD
* V
DD
* R
thJSB
for TO-92UA:
T = I
DD
* V
DD
* R
thJA
For typical values, use the typical parameters. For worst
case calculation, use the max. parameters for I
DD
and
R
th
, and the max. value for V
DD
from the application.
Test Circuits for Electromagnetic Compatibility
Test pulses V
EMC
corresponding to DIN 40839.
OUT
GND
3
2
1
V
DD
4.7 nF
V
EMC
V
P
R
V
220
R
L
1.2 k
20 pF
Fig. 21:
Test circuit 2: test procedure for class A
OUT
GND
3
2
1
V
DD
4.7 nF
V
EMC
R
V
220
R
L
680
Fig. 22:
Test circuit 1: test procedure for class C
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