參數(shù)資料
型號(hào): HA456CN
廠商: HARRIS SEMICONDUCTOR
元件分類: 運(yùn)動(dòng)控制電子
英文描述: 120MHz, Low Power, 8 x 8 Video Crosspoint Switch
中文描述: 8-CHANNEL, CROSS POINT SWITCH, PQFP44
文件頁(yè)數(shù): 5/15頁(yè)
文件大?。?/td> 158K
代理商: HA456CN
5
Output Capacitance
(Output Disabled)
PLCC Package
B
25
-
3.5
-
pF
MQFP Package
B
25
-
2.9
-
pF
Power Supply Rejection Ratio
DC, V
S
=
±
4.5V to
±
5.5V, V
IN
= 0V
V
IN
= 0V or 5V
A
Full
45
53
-
dB
Digital Input Current (Note 5)
A
Full
-
-
1
μ
A
Digital Input Low Voltage
A
Full
-
-
0.8
V
Digital Input High Voltage
A
25
2.0
-
-
V
A
Full
2.2
-
-
V
SER OUT Logic Low Voltage
Serial Mode, I
OL
= 1.6mA
Serial Mode, I
OH
= -0.4mA
A
Full
-
-
0.4
V
SER OUT Logic High Voltage
A
Full
3.0
-
-
V
AC CHARACTERISTICS
(Note 4)
-3dB Bandwidth (Note 6)
C
L
= 5pF, V
IN
= 200mV
P-P
C
L
= 5pF, V
IN
= 1V
P-P
C
L
= 5pF, V
IN
= 2V
P-P
V
OUT
= 4V
P-P
10MHz, V
IN
= 1V
P-P
, R
L
=1k
10MHz, V
IN
= 1V
P-P
NTSC or PAL, R
L
=
1k
NTSC or PAL, R
L
10k
NTSC or PAL, R
L
=
1k
NTSC or PAL, R
L
10k
B
25
-
120
-
MHz
B
25
-
70
-
MHz
B
25
-
50
-
MHz
Slew Rate (Note 6)
B
25
-
200
-
V/
μ
s
All Hostile Crosstalk (Note 6)
B
25
-
-55
-
dB
All Hostile Off Isolation (Note 6)
B
25
-
70
-
dB
Differential Phase
B
25
-
0.05
-
DEG
B
25
-
0.05
-
DEG
Differential Gain
B
25
-
0.05
-
%
B
25
-
0.02
-
%
TIMING CHARACTERISTICS
(See Figure 3 for more information)
Write Pulse Width High (t
WH
)
Write Pulse Width Low (t
WL
)
Chip-Enable Setup Time to Write (t
CS
)
Chip-Enable Hold Time From Write (t
CH
)
Data and Address Setup Time to Write (t
DS
)
A
Full
20
-
-
ns
A
Full
20
-
-
ns
A
Full
5
-
-
ns
A
Full
5
-
-
ns
Parallel Mode
A
Full
20
-
-
ns
Serial Mode
A
Full
20
-
-
ns
Data and Address Hold Time From Write (t
DH
)
Latch Pulse Width (t
L
)
Latch Delay From Write (t
D
)
LATCH Edge to Output Disabled (t
OFF
)
LATCH Edge to Output Enabled (t
ON
)
Output Break-Before-Make Delay
(t
ON -
t
OFF
)
NOTES:
2. For the lowest crosstalk, and the best composite video performance, use R
L
1k
.
3. Test Level: A. Production Tested; B. Typical or Guaranteed Limit Based on Characterization; C. Design Typical for Information Only.
4. See AC Test Circuits (Figure 6 through Figure 9).
5. Excludes D1/SER OUT which is a bidirectional terminal and thus falls under the higher Output Leakage limit.
6. See Typical Performance Curves for more information.
A
Full
25
-
-
ns
A
Full
40
-
-
ns
A
Full
40
-
-
ns
Serial Mode
B
Full
-
30
-
ns
Serial Mode
B
Full
-
185
-
ns
Serial Mode
B
Full
-
155
-
ns
Electrical Specifications
V
SUPPLY
=
±
5V, AGND = DGND = 0V, R
L
= 400
(
Note 2)
,
Unless Otherwise Specified.
(Continued)
PARAMETER
TEST CONDITIONS
(NOTE 3)
TEST
LEVEL
TEMP
(
o
C)
MIN
TYP
MAX
UNITS
HA456
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