
4
FN4153.5
August 14, 2006
Absolute Maximum Ratings
Thermal Information
Supply Voltage (V+ to V-). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12V
Positive Supply Voltage (V+) Referred to AGND. . . . . . . . . . . . . 6V
Negative Supply Voltage (V-) Referred to AGND. . . . . . . . . . . . -6V
DGND Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AGND
±
1V
Analog Input Voltage
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±
V
SUPPLY
Digital Input Voltage. . . . . . . . . . . . . . (V+ + 0.3V) to (DGND - 0.3V)
ESD Rating
Human Body Model (Per MIL-STD-883 Method 3015.7). . . . 1.5kV
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Supply Voltage Range (Typical)
. . . . . . . . . . . . . . . . . . .±
4.5V to
±
5.5V
Thermal Resistance (Typical, Note 1)
PLCC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Moisture Sensitivity (see Technical Brief TB363)
PLCC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 1
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150°C
Maximum Storage Temperature Range. . . . . . . . . . .-65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300°C
(Lead Tips Only)
θ
JA
(°C/W)
47
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
V
SUPPLY
= ±5V, AGND = DGND = 0V, R
L
= 400
Ω (
Note 2)
,
Unless Otherwise Specified.
PARAMETER
TEST CONDITIONS
(NOTE 3)
TEST
LEVEL
TEMP
(°C)
MIN
TYP
MAX
UNITS
Voltage Gain
V
IN
= -1.5V to +1.5V, Worst Case
Switch Configuration
A
25
0.992
0.996
1.00
V/V
A
Full
0.99
0.995
1.00
Channel-to-Channel Gain Mismatch
A
25
-
0.001
0.004
V/V
A
Full
-
0.001
0.005
Supply Current
All Outputs Enabled, R
L
= Open,
V
IN
= 0V,
Total for All V+ (3) or V- (2) Pins
A
25
-
68
80
mA
A
Full
-
71
83
Disabled Supply Current
All Outputs Disabled, R
L
= Open,
Total for All V+ (3) or V- (2) Pins
A
25
-
47
65
mA
A
Full
-
47
67
Input Voltage Range
A
Full
±2
±2.5
-
V
Analog Input Current
V
IN
= 0V
A
Full
-
1.6
12
μ
A
Input Noise (R
S
= 75
Ω
)
DC to 40MHz
B
25
-
0.15
-
mV
RMS
nV/
√
Hz
≥
10kHz
B
25
-
22
-
Analog Input Resistance
DC
C
25
-
4
-
M
Ω
Analog Input Capacitance (Input
Connected to One Output or All Outputs,
Note 6)
B
25
-
3.2
-
pF
Output Offset Voltage
V
IN
= 0V, Worst Case Switch
Configuration
A
25
-18
-6.5
5
mV
A
Full
-20
-7.5
6
Channel-to-Channel Offset Voltage
Mismatch
A
25
-
2
11
mV
A
Full
-
4
13
Offset Voltage Drift
B
Full
-
20
-
μ
V/°C
Output Voltage Swing
V
IN
= ±2.5V
A
25
±
2.2
±
2.48
-
V
A
Full
±
2.1
±
2.47
-
V
Output Resistance
Enabled, DC
B
25
-
0.25
-
Ω
Output Leakage Current
(Including D1/SER OUT)
All Outputs Disabled,
V
OUT
= 2.5V
A
25
-
0.2
5
μ
A
A
Full
-
1
10
μ
A
HA456