參數(shù)資料
型號(hào)： GT3200-JV
廠商： STANDARD MICROSYSTEMS CORP
元件分類： 網(wǎng)絡(luò)接口
英文描述： USB2.0 PJY IC
中文描述： DATACOM, INTERFACE CIRCUIT, PQFP64
封裝： 7 X 7 MM, 1.40 MM HEIGHT, GREEN, TQFP-64
文件頁(yè)數(shù)： 41/51頁(yè)
文件大小： 1462K
代理商： GT3200-JV
USB2.0 PHY IC
SMSC GT3200, SMSC USB3250
36
Revision 1.3 (10-05-04)
DATASHEET
To detect the assertion of the downstream Chirp K's and Chirp J's for 2.5us {TFILT}, the SIE must see
the appropriate LINESTATE signals asserted continuously for 165 CLK60 cycles.
Figure 8.6 HS Detection Handshake Timing Behavior from Suspend
Table 8.8 HS Detection Handshake Timing Values from Suspend
TIMING
PARAMETER
DESCRIPTION
VALUE
T0
While in suspend state an SE0 is detected on the
USB. HS Handshake begins. D+ pull-up enabled, HS
terminations disabled, SUSPENDN negated.
0 (HS Reset T0)
T1
First transition of CLKOUT. CLKOUT "Usable"
(frequency accurate to ±10%, duty cycle accurate to
50±5).
T0 < T1 < T0 + 5.6ms
T2
Device asserts Chirp K on the bus.
T1 < T2 < T0 + 5.8ms
T3
Device removes Chirp K from the bus. (1 ms
minimum width) and begins looking for host chirps.
T2 + 1.0 ms < T3 < T0 + 7.0 ms
T4
CLK "Nominal" (CLKOUT is frequency accurate to
±500 ppm, duty cycle accurate to 50±5).
T1 < T3 < T0 + 20.0ms
CLK60
Look for host chirps
Device Chirp K
SUSPENDN
DP/DM
TERMSELECT
TXVALID
SE0
J
CLK power up time
XCVRSELECT
OPMODE 1
OPMODE 0
time
T0
T3
T4
T1
T2
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