參數(shù)資料
型號(hào)： GS9023A
元件分類： Codec
英文描述： SD Embedded Audio CODEC
中文描述： 政府統(tǒng)計(jì)處的嵌入式音頻編解碼器
文件頁(yè)數(shù)： 3/30頁(yè)
文件大?。?/td> 445K
代理商： GS9023A
19922 - 2
3
G
AC ELECTRICAL CHARCTERISTICS
V
DD
= 5.0 V, T
A
= 0 - 70
°
C unless otherwise shown.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
NOTES
Serial Input Clock
Frequency
SCI
-
-
540
MHz
Serial Data Input
Setup Time
t
SS
600
-
-
ps
1
Serial Data Input Hold
Time
t
SH
600
-
-
ps
1
Serial Data Output
Duty Cycle Distortion
-
5
-
%
Serial Output Jitter
540Mb/s at eye crossing
-
360
-
ps p-p
Serial Data Output
Rise Time
-
600
-
ps
Parallel Clock Output
Jitter
27MHz at 50% voltage
level
-
700
-
ps p-p
Input Timing
t
1
20
-
-
ns
2
t
2
-
-
9
ns
2
Output Delay Time
t
OD
with 25pF loading
T/2
-
T/2+7
ns
3
Output Hold Time
t
OH
with 25pF loading
T/2-3
-
-
ns
3
Output Setup Time
t
OS
with 25pF loading
T/2-7
-
-
ns
3
Flag Port Disable Time
t
FDIS
with 25pF loading
-
-
T/2+0.5
ns
Flag Port Enable Time
t
FEN
with 25pF loading
-
-
T/2+1
ns
I
2
C Clock Frequency
SCL
-
-
400
kHz
Host Interface Setup
Time
t
HS
6
-
-
ns
4
Host Interface Hold
Time
t
HH
6
-
-
ns
4
Host Interface Output
Enable Time
t
HEN
with 25pF loading
-
-
21
ns
4
Host Interface Output
Disable Time
t
HDIS
with 25pF loading
-
-
10
ns
4
Reset Time Pulse
Width
t
RESET
100
-
-
ns
NOTES
1. The serial clock rising edge should occur at the centre of the data period for optimum performance. (See Figure 1)
2. Since the GS9020A does not have a parallel clock input, it is not possible to define timing details relative to it. Instead the
GS9020A has a parallel clock output and all timing information is relative to PCLKOUT. The flag port pins (FL[4:0], F_R/W,
S[1:0]) are the only inputs where the timing details are important. The timing requirements are shown in Figure 2.
3. These times are relative to the rising edge of PCLKOUT as shown in Figure 3. Note that the data transitions at the falling
edge of PCLKOUT. T is the parallel clock period in ns.
4. The Host Interface signals, P[7:0], R/W, A/D and CS are asynchronous to the parallel clock.
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參數(shù)描述
GS9023ACFY 制造商:GENNUM 制造商全稱:GENNUM 功能描述:GENLINX -TM II GS9023A Embedded Audio CODEC
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GS9023B 制造商:GENNUM 制造商全稱:GENNUM 功能描述:Embedded Audio CODEC
GS9023BCVE3 功能描述:IC AUDIO CODEC 100PIN TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動(dòng)態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR)
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