參數(shù)資料
型號(hào): GS882V36BD-333I
廠商: GSI TECHNOLOGY
元件分類: DRAM
英文描述: 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
中文描述: 256K X 36 CACHE SRAM, 4.5 ns, PBGA165
封裝: 13 X 15 MM, 1 MM PITCH, FBGA-165
文件頁(yè)數(shù): 16/36頁(yè)
文件大?。?/td> 732K
代理商: GS882V36BD-333I
GS882V18/36BB/D-333/300/250/200
Rev: 1.02 3/2005
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
16/36
2004, GSI Technology
AC Test Conditions
Parameter
Conditions
V
DD
– 0.2 V
0.2 V
1 V/ns
V
DD
/2
V
DDQ
/2
Fig. 1
Input high level
Input low level
Input slew rate
Input reference level
Output reference level
Output load
Notes:
1.
2.
Include scope and jig capacitance.
Test conditions as specified with output loading as shown in
Fig. 1
unless otherwise noted.
Device is deselected as defined by the Truth Table.
3.
DC Electrical Characteristics
Parameter
Input Leakage Current
(except mode pins)
Symbol
Test Conditions
Min
Max
I
IL
V
IN
= 0 to V
DD
1 uA
1 uA
ZZ Input Current
I
IN1
V
DD
V
IN
V
IH
0 V
V
IN
V
IH
V
DD
V
IN
V
IL
0 V
V
IN
V
IL
Output Disable, V
OUT
= 0 to V
DD
I
OH
=
4 mA, V
DDQ
= 1.6 V
I
OL
= 4 mA, V
DD
= 1.6 V
1 uA
1 uA
1 uA
100 uA
FT, SCD, and ZQ Input Current
I
IN2
100 uA
1 uA
1 uA
1 uA
Output Leakage Current
I
OL
V
OH1
V
OL1
1 uA
1 uA
Output High Voltage
V
DDQ
– 0.4 V
Output Low Voltage
0.4 V
DQ
V
DDQ/2
50
30pF
*
Output Load 1
* Distributed Test Jig Capacitance
相關(guān)PDF資料
PDF描述
GS882V36BGB-200 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
GS882V36BGB-200I 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
GS882V36BGB-250 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
GS882V36BGB-250I 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
GS882V36BGB-300 512K x 18, 256K x 36 9Mb SCD/DCD Sync Burst SRAMs
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