參數資料
型號: GS88136
廠商: GSI TECHNOLOGY
英文描述: 8Mb(256K x 36Bit)ByteSafe Synchronous Burst SRAM(8M位(256K x 36位)ByteSafe同步靜態(tài)RAM(帶2位脈沖地址計數器))
中文描述: 8MB的(256 × 36Bit)ByteSafe同步突發(fā)靜態(tài)存儲器(800萬位(256K × 36位)ByteSafe同步靜態(tài)隨機存儲器(帶2位脈沖地址計數器))
文件頁數: 27/33頁
文件大?。?/td> 463K
代理商: GS88136
Rev: 1.11 9/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com
27/33
2000, Giga Semconductor, Inc.
Preliminary
GS88118/36T-11/11.5/100/80/66
JTAG Port Recommended Operating Conditions and DC Characteristics
JTAG Port AC Test Conditions
Parameter
Symbol Mn.
V
IHT
V
ILT
I
INTH
I
INTL
I
OLT
V
OHT
V
OLT
Max.
V
DD
+0.3
Unit Notes
Test Port Input High Voltage
1.7
V
1, 2
Test Port Input Low Voltage
–0.3
0.8
V
1, 2
TMS, TCK and TDI Input Leakage Current
–300
1
uA
3
TMS, TCK and TDI Input Leakage Current
–1
1
uA
4
TDO Output Leakage Current
–1
1
uA
5
Test Port Output High Voltage
2.4
V
6, 7
Test Port Output Low Voltage
0.4
V
6, 8
Notes:
1.
2.
This device features input buffers compatible with both 3.3 V and 2.5 V I/O drivers.
Input Under/overshoot voltage must be –2 V > Vi < V
DD
+2 V with a pulse width not to exceed 20%
tTKC.
V
DD
V
IN
V
IL
0 V
V
IN
V
IL
Output Disable, V
OUT
= 0 to V
DD
The TDO output driver is served by the V
DD
supply.
I
OH
= –4 mA
I
OL
= +4 mA
3.
4.
5.
6.
7.
8.
Notes:
1.
Include scope and jig capacitance.
Parameter
Input high level
Input low level
Input slew rate
Input reference level
Output reference level
Conditions
2.3 V
0.2 V
1 V/ns
1.25 V
1.25 V
DQ
V
T
= 1.25 V
50
30pF
*
JTAG Port AC Test Load
*Distributed Test Jig Capacitance
相關PDF資料
PDF描述
GS88118 8Mb(512K x 18Bit) ByteSafe Synchronous Burst SRAM(8M位(512K x 18位)ByteSafe同步靜態(tài)RAM(帶2位脈沖地址計數器))
GS881E18T 512K x 18, 256K x 36 ByteSafe 8Mb Sync Burst SRAMs
GS881E36T-100I 512K x 18, 256K x 36 ByteSafe 8Mb Sync Burst SRAMs
GS881E36T-11 512K x 18, 256K x 36 ByteSafe 8Mb Sync Burst SRAMs
GS881E36T-11.5 512K x 18, 256K x 36 ByteSafe 8Mb Sync Burst SRAMs
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