參數(shù)資料
型號(hào): GS88118
廠商: GSI TECHNOLOGY
英文描述: 8Mb(512K x 18Bit) ByteSafe Synchronous Burst SRAM(8M位(512K x 18位)ByteSafe同步靜態(tài)RAM(帶2位脈沖地址計(jì)數(shù)器))
中文描述: 8MB的(為512k × 18位)ByteSafe同步突發(fā)靜態(tài)存儲(chǔ)器(800萬位(為512k × 18位)ByteSafe同步靜態(tài)隨機(jī)存儲(chǔ)器(帶2位脈沖地址計(jì)數(shù)器))
文件頁數(shù): 16/33頁
文件大小: 463K
代理商: GS88118
Rev: 1.11 9/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com
16/33
2000, Giga Semconductor, Inc.
Preliminary
GS88118/36T-11/11.5/100/80/66
AC Electrical Characteristics
Notes:
1.
2.
These parameters are sampled and are not 100% tested.
ZZ is an asynchronous signal. However, in order to be recognized on any given clock cycle, ZZ must meet the specified setup and hold
times as specified above.
Parameter
Symbol
-11
-11.5
-100
-80
-66
Unit
Min
10
1.5
Max
4.0
Min
10
1.5
Max
4.0
Min
10
1.5
Max
4.0
Min
12.5
1.5
Max
4.5
Min
15
1.5
Max
5
Pipeline
Clock Cycle Time
Clock to Output Valid
Clock to Output Invalid
tKC
tKQ
tKQX
ns
ns
ns
Clock to Output in Low-Z
tLZ
1
tKC
tKQ
tKQX
1.5
1.5
1.5
1.5
1.5
ns
Flow-
Thru
Clock Cycle Time
Clock to Output Valid
Clock to Output Invalid
15.0
3.0
11.0
15.0
3.0
11.5
15.0
3.0
12.0
15.0
3.0
14.0
20
3.0
18
ns
ns
ns
Clock to Output in Low-Z
tLZ
1
tKH
tKL
3.0
3.0
3.0
3.0
3.0
ns
Clock HIGH Time
Clock LOW Time
1.7
2
1.7
2
2
2
2.3
2.5
ns
ns
2.2
2.2
Clock to Output in High-Z
tHZ
1
tOE
1.5
4.0
1.5
4.2
1.5
4.5
1.5
4.5
1.5
4.8
ns
G to Output Valid
4.0
4.2
4.5
4.5
4.8
ns
G to output in Low-Z
tOLZ
1
0
0
0
0
0
ns
G to output in High-Z
tOHZ
1
tS
tH
4.0
4.2
4.5
4.5
4.8
ns
Setup time
Hold time
1.5
0.5
2.0
0.5
2.0
0.5
2.0
0.5
2.0
0.5
ns
ns
ZZ setup time
tZZS
2
5
5
5
5
5
ns
ZZ hold time
tZZH
2
tZZR
1
1
1
1
1
ns
ZZ recovery
20
20
20
20
20
ns
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