參數(shù)資料
型號: GS8662R09E-333I
廠商: GSI TECHNOLOGY
元件分類: DRAM
英文描述: 72Mb SigmaCIO DDR-II Burst of 4 SRAM
中文描述: 8M X 9 DDR SRAM, 0.45 ns, PBGA165
封裝: 15 MM X 17 MM, 1MM PITCH, FPBGA-165
文件頁數(shù): 12/37頁
文件大?。?/td> 942K
代理商: GS8662R09E-333I
B4 Byte Write Clock Truth Table
BW
BW
BW
BW
Current Operation
D
D
D
D
K
(t
n+1
)
K
(t
n+1
)
K
(t
n+2
)
K
(t
n+2
)
K
(t
n
)
K
(t
n+1
)
K
(t
n+1
)
K
(t
n+2
)
K
(t
n+2
)
T
T
T
T
Write
Dx stored if BWn = 0 in all four data transfers
D0
D2
D3
D4
T
F
F
F
Write
Dx stored if BWn = 0 in 1st data transfer only
D0
X
X
X
F
T
F
F
Write
Dx stored if BWn = 0 in 2nd data transfer only
X
D1
X
X
F
F
T
F
Write
Dx stored if BWn = 0 in 3rd data transfer only
X
X
D2
X
F
F
F
T
Write
Dx stored if BWn = 0 in 4th data transfer only
X
X
X
D3
F
F
F
F
Write Abort
No Dx stored in any of the four data transfers
X
X
X
X
Notes:
1.
2.
“1” = input “high”; “0” = input “l(fā)ow”; “X” = input “don’t care”; “T” = input “true”; “F” = input “false”.
If one or more BWn = 0, then BW = “T”, else BW = “F”.
Preliminary
GS8662R08/09/18/36E-333/300/250/200/167
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.01 9/2005
12/37
2005, GSI Technology
*Assuming stable conditions, the RAM can achieve optimum impedance within 1024 cycles.
相關(guān)PDF資料
PDF描述
GS8662S08E-333I 72Mb Burst of 2 DDR SigmaSIO-II SRAM
GS8662S08E 72Mb Burst of 2 DDR SigmaSIO-II SRAM
GS8662S08E-167 72Mb Burst of 2 DDR SigmaSIO-II SRAM
GS8662S08E-167I 72Mb Burst of 2 DDR SigmaSIO-II SRAM
GS8662S08E-200 72Mb Burst of 2 DDR SigmaSIO-II SRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GS8662R09GE-167 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb SigmaCIO DDR-II Burst of 4 SRAM
GS8662R09GE-167I 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb SigmaCIO DDR-II Burst of 4 SRAM
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GS8662R09GE-200I 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb SigmaCIO DDR-II Burst of 4 SRAM
GS8662R09GE-250 制造商:GSI Technology 功能描述:SRAM SYNC SGL 1.8V 72MBIT 8MX9 0.45NS 165FBGA - Trays