參數(shù)資料
型號: GS82032A
廠商: GSI TECHNOLOGY
英文描述: 2Mb(64K x 32Bit) Synchronous Burst SRAM(2M位(64K x 32位)同步靜態(tài)RAM(帶2位脈沖地址計(jì)數(shù)器))
中文描述: 2MB的(64K的x 32位)同步突發(fā)靜態(tài)存儲器(200萬位(64K的× 32位)同步靜態(tài)隨機(jī)存儲器(帶2位脈沖地址計(jì)數(shù)器))
文件頁數(shù): 13/23頁
文件大小: 757K
代理商: GS82032A
Rev: 1.07 12/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
13/23
2000, Giga Semiconductor, Inc.
GS82032AT/Q-200/180/166/133/100
AC Electrical Characteristics
Notes:
1.
2.
These parameters are sampled and are not 100% tested.
ZZ is an asynchronous signal. However, in order to be recognized on any given clock cycle, ZZ must meet the specified setup and hold
times as specified above.
Parameter
Symbol
-200
-180
-166
-133
-100
Unit
Min
5
1.5
Max
3
Min
5.5
1.5
Max
3.2
Min
6
1.5
Max
3.5
Min
7.5
1.5
Max
4
Min
10
1.5
Max
5
Pipeline
Clock Cycle Time
Clock to Output Valid
Clock to Output Invalid
tKC
tKQ
tKQX
ns
ns
ns
Clock to Output in Low-Z
tLZ
1
tKC
tKQ
tKQX
1.5
1.5
1.5
1.5
1.5
ns
Flow-
Thru
Clock Cycle Time
Clock to Output Valid
Clock to Output Invalid
8.8
3
7.5
9.1
3
8
10
3
8.5
12
3
10
15
3
12
ns
ns
ns
Clock to Output in Low-Z
tLZ
1
tKH
tKL
3
3
3
3
3
ns
Clock HIGH Time
Clock LOW Time
1.3
1.5
1.3
1.5
1.3
1.5
1.3
1.5
1.3
1.5
ns
ns
Clock to Output in High-Z
tHZ
1
tOE
1.5
3
1.5
3.2
1.5
3.5
1.5
4
1.5
5
ns
G to Output Valid
3
3.2
3.5
4
5
ns
G to output in Low-Z
tOLZ
1
0
0
0
0
0
ns
G to output in High-Z
tOHZ
1
tS
tH
3
3.2
3.5
4
5
ns
Setup time
Hold time
1.5
0.5
1.5
0.5
1.5
0.5
1.5
0.5
1.5
0.5
ns
ns
ZZ setup time
tZZS
2
5
5
5
5
5
ns
ZZ hold time
tZZH
2
tZZR
1
1
1
1
1
ns
ZZ recovery
20
20
20
20
20
ns
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