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參數(shù)資料
| 型號(hào)： | GS8162Z72CGC-250IVT |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | SRAM |
| 英文描述： | 256K X 72 ZBT SRAM, 5.5 ns, PBGA209 |
| 封裝： | 14 X 22 MM, 1 MM PITCH, ROHS COMPLIANT, FPBGA-209 |
| 文件頁數(shù)： | 4/27頁 |
| 文件大?。?/td> | 727K |
| 代理商： | GS8162Z72CGC-250IVT |
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GS8162Z72CC-xxxV
Preliminary
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.03a 4/2008
12/27
2004, GSI Technology
VDDQ2 & VDDQ1 Range Logic Levels
Parameter
Symbol
Min.
Typ.
Max.
Unit
Notes
VDD Input High Voltage
VIH
0.6*VDD
—
VDD + 0.3
V
1
VDD Input Low Voltage
VIL
–0.3
—
0.3*VDD
V
1
Notes:
1. The part numbers of Industrial Temperature Range versions end the character “I”. Unless otherwise noted, all performance specifica-
tions quoted are evaluated for worst case in the temperature range marked on the device.
2. Input Under/overshoot voltage must be –2 V > Vi < VDDn+2 V not to exceed 4.6 V maximum, with a pulse width not to exceed 20% tKC.
Recommended Operating Temperatures
Parameter
Symbol
Min.
Typ.
Max.
Unit
Notes
Ambient Temperature (Commercial Range Versions)
TA
0
25
70
C
2
Ambient Temperature (Industrial Range Versions)
TA
–40
25
85
C
2
Notes:
1. The part numbers of Industrial Temperature Range versions end the character “I”. Unless otherwise noted, all performance specifica-
tions quoted are evaluated for worst case in the temperature range marked on the device.
2. Input Under/overshoot voltage must be –2 V > Vi < VDDn+2 V not to exceed 4.6 V maximum, with a pulse width not to exceed 20% tKC.
20% tKC
VSS – 2.0 V
50%
VSS
VIH
Undershoot Measurement and Timing
Overshoot Measurement and Timing
20% tKC
VDD + 2.0 V
50%
VDD
VIL
Capacitance
oC, f = 1 MHZ, VDD = 2.5 V)
Parameter
Symbol
Test conditions
Typ.
Max.
Unit
Input Capacitance
CIN
VIN = 0 V
8
10
pF
Input/Output Capacitance
CI/O
VOUT = 0 V
12
14
pF
Note:
These parameters are sample tested.
(TA = 25
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