參數(shù)資料
型號： GS8161Z18
廠商： Electronic Theatre Controls, Inc.
英文描述： 13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs 64-TSSOP 0 to 70
中文描述： 35.7流水線和流量，通過同步唑的SRAM
文件頁數(shù)： 17/36頁
文件大?。?/td> 939K
代理商： GS8161Z18
GS8161Z18(T/D)/GS8161Z32(D)/GS8161Z36(T/D)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 2.15 11/2004
17/36
1998, GSI Technology
V
DDQ3
Range Logic Levels
Parameter
Symbol
Min.
Typ.
Max.
Unit
Notes
V
DD
Input High Voltage
V
IH
2.0
—
V
DD
+ 0.3
V
1
V
DD
Input Low Voltage
V
IL
–
0.3
—
0.8
V
1
V
DDQ
I/O Input High Voltage
V
IHQ
2.0
—
V
DDQ
+ 0.3
V
1,3
V
DDQ
I/O Input Low Voltage
V
ILQ
–
0.3
—
0.8
V
1,3
Notes:
1.
The part numbers of Industrial Temperature Range versions end the character “I”. Unless otherwise noted, all performance specifica-
tions quoted are evaluated for worst case in the temperature range marked on the device.
Input Under/overshoot voltage must be
–
2 V > Vi < V
DDn
+2 V not to exceed 4.6 V maximum, with a pulse width not to exceed 20% tKC.
V
IHQ
(max) is voltage on V
DDQ
pins plus 0.3 V.
2.
3.
V
DDQ2
Range Logic Levels
Parameter
Symbol
Min.
Typ.
Max.
Unit
Notes
V
DD
Input High Voltage
V
IH
0.6*V
DD
—
V
DD
+ 0.3
V
1
V
DD
Input Low Voltage
V
IL
–
0.3
—
0.3*V
DD
V
1
V
DDQ
I/O Input High Voltage
V
IHQ
0.6*V
DD
—
V
DDQ
+ 0.3
V
1,3
V
DDQ
I/O Input Low Voltage
V
ILQ
–
0.3
—
0.3*V
DD
V
1,3
Notes:
1.
The part numbers of Industrial Temperature Range versions end the character “I”. Unless otherwise noted, all performance specifica-
tions quoted are evaluated for worst case in the temperature range marked on the device.
Input Under/overshoot voltage must be
–
2 V > Vi < V
DDn
+2 V not to exceed 4.6 V maximum, with a pulse width not to exceed 20% tKC.
V
IHQ
(max) is voltage on V
DDQ
pins plus 0.3 V.
2.
3.
Recommended Operating Temperatures
Parameter
Symbol
Min.
Typ.
Max.
Unit
Notes
Ambient Temperature (Commercial Range Versions)
T
A
0
25
70
°
C
2
Ambient Temperature (Industrial Range Versions)
T
A
–
40
25
85
°
C
2
Notes:
1.
The part numbers of Industrial Temperature Range versions end the character “I”. Unless otherwise noted, all performance specifica-
tions quoted are evaluated for worst case in the temperature range marked on the device.
Input Under/overshoot voltage must be
–
2 V > Vi < V
DDn
+2 V not to exceed 4.6 V maximum, with a pulse width not to exceed 20% tKC.
2.
相關(guān)PDF資料
PDF描述
GS8161Z18D-166 13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs 56-VQFN 0 to 70
GS8161Z18D-166I 13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs 56-VQFN 0 to 70
GS8161Z18D-166IT 24-Bit to 48-Bit Registered Buffer with SSTL_2 Inputs and Outputs 114-BGA MICROSTAR 0 to 70
GS8161Z18D-166T 24-Bit to 48-Bit Registered Buffer with SSTL_2 Inputs and Outputs 114-LFBGA 0 to 70
GS8161Z18D-200 18Mb Pipelined and Flow Through Synchronous NBT SRAM
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