參數(shù)資料
型號: GS8161E3T-200
廠商: Electronic Theatre Controls, Inc.
英文描述: 13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs 56-VQFN 0 to 70
中文描述: 100萬× 18,512k × 32的,為512k × 36 35.7同步突發(fā)靜態(tài)存儲器
文件頁數(shù): 31/36頁
文件大小: 939K
代理商: GS8161E3T-200
GS8161Z18(T/D)/GS8161Z32(D)/GS8161Z36(T/D)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 2.15 11/2004
31/36
1998, GSI Technology
TQFP Package Drawing (Package T)
D
D
E1
E
P
b
e
c
L
L1
A2
A1
Y
θ
Notes:
1.
2.
All dimensions are in millimeters (mm).
Package width and length do not include mold protrusion.
Symbol
Description
Min.
Nom.
Max
A1
Standoff
0.05
0.10
0.15
A2
Body Thickness
1.35
1.40
1.45
b
Lead Width
0.20
0.30
0.40
c
Lead Thickness
0.09
0.20
D
Terminal Dimension
21.9
22.0
22.1
D1
Package Body
19.9
20.0
20.1
E
Terminal Dimension
15.9
16.0
16.1
E1
Package Body
13.9
14.0
14.1
e
Lead Pitch
0.65
L
Foot Length
0.45
0.60
0.75
L1
Lead Length
1.00
Y
Coplanarity
0.10
θ
Lead Angle
0
°
7
°
相關PDF資料
PDF描述
GS8161Z18 13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs 64-TSSOP 0 to 70
GS8161Z18D-166 13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs 56-VQFN 0 to 70
GS8161Z18D-166I 13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs 56-VQFN 0 to 70
GS8161Z18D-166IT 24-Bit to 48-Bit Registered Buffer with SSTL_2 Inputs and Outputs 114-BGA MICROSTAR 0 to 70
GS8161Z18D-166T 24-Bit to 48-Bit Registered Buffer with SSTL_2 Inputs and Outputs 114-LFBGA 0 to 70
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