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參數(shù)資料
| 型號： | GS8161E36T-225 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 14-Bit Registered Buffer With SSTL_2 Inputs and Outputs 48-TVSOP 0 to 70 |
| 中文描述： | 100萬× 18，512k × 32的，為512k × 36 35.7同步突發(fā)靜態(tài)存儲器 |
| 文件頁數(shù)： | 36/36頁 |
| 文件大?。?/td> | 939K |
| 代理商： | GS8161E36T-225 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁當前第36頁
GS8161Z18(T/D)/GS8161Z32(D)/GS8161Z36(T/D)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 2.15 11/2004
36/36
1998, GSI Technology
8161Z18_r2_09;
8161Z18_r2_10
Content
Updated table on page 1
Created recommended operating conditions tables on pages
15 and 16
Updated AC Electrical Characteristics table
Updated Ordering Information for 225 MHz part (changed
from 7ns to 6.5 ns)
Updated BSR table (2 and 3 changed to X (value undefined))
Added 250 MHz speed bin
Deleted 180 MHz speed bin
Updated AC Characteristics table
Updated FT power numbers
Updated Mb references from 16Mb to 18Mb
Removed ByteSafe references
Changed DP and QE pins to NC
Updated ZZ recovery time diagram
Updated AC Test Conditions table and removed Output Load
2 diagram
Removed Preliminary banner
Removed BSR table
Removed pin locations from pin description table
Removed erroneous references to parity check
Added 165 BGA parts for x18 and x36; add x32 165 part
Update Abs Max table
Added missing JTAG pin descriptions to TQFP pin description
table
Updated Synchronous Truth Table
Removed A and DQ numbers from pinouts
Updated timing diagrams
Added commercial “D” parts to ordering information table
Format updated
Updated format
Updated timing diagrams
Updated mechanical drawings
8161Z18_r2_10;
8161Z18_r2_11
Content
8161Z18_r2_11;
8161Z18_r2_12
Content
8161Z18_r2_12;
8161Z18_r2_13
Content
8161Z18_r2_13;
8161Z18_r2_14
Content/Format
8161Z18_r2_14;
8161Z18_r2_15
Content/Format
18Mb Sync SRAM Data Sheet Revision History
DS/DateRev. Code: Old;
New
Types of Changes
Format or Content
Page;Revisions;Reason
相關PDF資料 |
PDF描述 |
|---|---|
| GS8161E36T-225I | 1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs |
| GS8161E36T-250 | 14-Bit Registered Buffer With SSTL_2 Inputs and Outputs 48-TSSOP 0 to 70 |
| GS8161E36T-250I | 13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs 64-TSSOP 0 to 70 |
| GS8161E3T-200 | 13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs 56-VQFN 0 to 70 |
| GS8161Z18 | 13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs 64-TSSOP 0 to 70 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| GS8161E36T-225I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs |
| GS8161E36T-250 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs |
| GS8161E36T-250I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs |
| GS8161E3T-200 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs |
| GS8161FZ18BD | 制造商:GSI 制造商全稱:GSI Technology 功能描述:18Mb Flow Through Synchronous NBT SRAM |
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