參數(shù)資料
型號: GS8161E36T-225
廠商: Electronic Theatre Controls, Inc.
英文描述: 14-Bit Registered Buffer With SSTL_2 Inputs and Outputs 48-TVSOP 0 to 70
中文描述: 100萬× 18,512k × 32的,為512k × 36 35.7同步突發(fā)靜態(tài)存儲器
文件頁數(shù): 16/36頁
文件大?。?/td> 939K
代理商: GS8161E36T-225
GS8161Z18(T/D)/GS8161Z32(D)/GS8161Z36(T/D)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 2.15 11/2004
16/36
1998, GSI Technology
Absolute Maximum Ratings
(All voltages reference to V
SS
)
Note:
Permanent damage to the device may occur if the Absolute Maximum Ratings are exceeded. Operation should be restricted to Recommended
Operating Conditions. Exposure to conditions exceeding the Absolute Maximum Ratings, for an extended period of time, may affect reliability of
this component.
Symbol
V
DD
V
DDQ
V
I/O
V
IN
I
IN
I
OUT
P
D
T
STG
Description
Voltage on V
DD
Pins
Voltage in V
DDQ
Pins
Value
Unit
0.5 to 4.6
V
0.5 to 4.6
V
Voltage on I/O Pins
0.5 to V
DDQ
+0.5 (
4.6 V max.)
0.5 to V
DD
+0.5 (
4.6 V max.)
V
Voltage on Other Input Pins
V
Input Current on Any Pin
+/
20
mA
Output Current on Any I/O Pin
+/
20
mA
Package Power Dissipation
1.5
W
Storage Temperature
55 to 125
o
C
T
BIAS
Temperature Under Bias
55 to 125
o
C
Power Supply Voltage Ranges
Parameter
Symbol
Min.
Typ.
Max.
Unit
Notes
3.3 V Supply Voltage
V
DD3
3.0
3.3
3.6
V
2.5 V Supply Voltage
V
DD2
2.3
2.5
2.7
V
3.3 V V
DDQ
I/O Supply Voltage
V
DDQ3
3.0
3.3
3.6
V
2.5 V V
DDQ
I/O Supply Voltage
V
DDQ2
2.3
2.5
2.7
V
Notes:
1.
The part numbers of Industrial Temperature Range versions end the character “I”. Unless otherwise noted, all performance specifica-
tions quoted are evaluated for worst case in the temperature range marked on the device.
Input Under/overshoot voltage must be
2 V > Vi < V
DDn
+2 V not to exceed 4.6 V maximum, with a pulse width not to exceed 20% tKC.
2.
相關PDF資料
PDF描述
GS8161E36T-225I 1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs
GS8161E36T-250 14-Bit Registered Buffer With SSTL_2 Inputs and Outputs 48-TSSOP 0 to 70
GS8161E36T-250I 13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs 64-TSSOP 0 to 70
GS8161E3T-200 13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs 56-VQFN 0 to 70
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