參數(shù)資料
型號(hào): GS8161E36D-250I
廠商: Electronic Theatre Controls, Inc.
元件分類: DRAM
英文描述: 1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs
中文描述: 1M×18,512k×32,512k×36 18M位同步突發(fā)靜態(tài)存儲(chǔ)器
文件頁(yè)數(shù): 30/36頁(yè)
文件大?。?/td> 939K
代理商: GS8161E36D-250I
GS8161Z18(T/D)/GS8161Z32(D)/GS8161Z36(T/D)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 2.15 11/2004
30/36
1998, GSI Technology
JTAG Port Timing Diagram
Boundary Scan (BSDL Files)
For information regarding the Boundary Scan Chain, or to obtain BSDL files for this part, please contact our Applications
Engineering Department at: apps@gsitechnology.com.
JTAG Port AC Electrical Characteristics
Parameter
TCK Cycle Time
TCK Low to TDO Valid
TCK High Pulse Width
TCK Low Pulse Width
TDI & TMS Set Up Time
TDI & TMS Hold Time
Symbol
tTKC
tTKQ
tTKH
tTKL
tTS
tTH
Min
50
20
20
10
10
Max
20
Unit
ns
ns
ns
ns
ns
ns
tTH
tTS
tTKQ
tTH
tTS
tTH
tTS
tTKL
tTKH
tTKC
TCK
TDI
TMS
TDO
Parallel SRAM input
相關(guān)PDF資料
PDF描述
GS8161E36T-150I 1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs
GS8161E36T-166 1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs
GS8161E36T-166I 1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs
GS8161E36T-200I 14-Bit Registered Buffer With SSTL_2 Inputs and Outputs 48-TSSOP 0 to 70
GS8161E36T-225 14-Bit Registered Buffer With SSTL_2 Inputs and Outputs 48-TVSOP 0 to 70
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GS8161E36DD-150 制造商:GSI Technology 功能描述:165 BGA - Bulk
GS8161E36DD-150I 制造商:GSI Technology 功能描述:165 BGA - Bulk
GS8161E36DD-150IV 制造商:GSI Technology 功能描述:165 BGA - Bulk
GS8161E36DD-150V 制造商:GSI Technology 功能描述:165 BGA - Bulk
GS8161E36DD-200 制造商:GSI Technology 功能描述:165 BGA - Bulk