參數(shù)資料
型號(hào)： GS8160Z18
廠(chǎng)商： GSI TECHNOLOGY
英文描述： 16Mb Pipelined and Flow Through Synchronous NBT SRAM(16M位流水線(xiàn)式和流通型同步NBT靜態(tài)RAM)
中文描述： 16Mb的流水線(xiàn)和流量，通過(guò)同步唑的SRAM（1,600位流水線(xiàn)式和流通型同步唑靜態(tài)內(nèi)存）
文件頁(yè)數(shù)： 4/24頁(yè)
文件大?。?/td> 476K
代理商： GS8160Z18
Rev: 2.08 11/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
4/24
1998, Giga Semiconductor, Inc.
Preliminary
GS8160Z18/36T-225/200/180/166/150/133
100 Pin TQFP Pin Descriptions
Pin Location
37, 36
35, 34, 33, 32, 100, 99, 84, 83,
82, 81, 44, 45, 46,47, 48, 49, 50
80
89
93
94
95
96
88
98
97
92
86
85
87
58, 59, 62,63, 68, 69, 72, 73, 74
8, 9, 12, 13, 18, 19, 22, 23, 24
51, 52, 53, 56, 57, 75, 78, 79,
1, 2, 3, 6, 7, 25, 28, 29, 30
51, 52, 53, 56, 57, 58, 59, 62,63
68, 69, 72, 73, 74, 75,
78, 79, 80
1, 2, 3, 6, 7, 8, 9, 12, 13
18, 19, 22, 23, 24, 25, 28, 29, 30 DQ
D1
–
DQ
D9
64
14
31
Symbol
A
0
, A
1
Type
In
Description
Burst Address Inputs; Preload the burst counter
A
2
–
A
18
In
Address Inputs
A
19
CK
B
A
B
B
B
C
B
D
W
E
1
E
2
E
3
G
ADV
CKE
In
In
In
In
In
In
In
In
In
In
In
In
In
I/O
I/O
Address Input (x18 Version Only)
Clock Input Signal
Byte Write signal for data inputs DQ
A1
-DQ
A9
; active low
Byte Write signal for data inputs DQ
B1
-DQ
B9
; active low
Byte Write signal for data inputs DQ
C1
-DQ
C9
; active low (x36 Versions Only)
Byte Write signal for data inputs DQ
D1
-DQ
D9
; active low (x36 Versions Only)
Write Enable; active low
Chip Enable; active low
Chip Enable; Active High. For self decoded depth expansion
Chip Enable; Active Low. For self decoded depth expansion
Output Enable; active low
Advance/Load; Burst address counter control pin
Clock Input Buffer Enable; active low
Byte A Data Input and Output pins (x18 Version Only)
Byte B Data Input and Output pins (x18 Version Only)
DQ
A1
–
DQ
A9
DQ
B1
–
DQ
B9
NC
—
No Connect (x18 Version Only)
DQ
A1
–
DQ
A9
I/O
Byte A Data Input and Output pins (x36 Versions Only)
DQ
B1
–
DQ
B9
I/O
Byte B Data Input and Output pins (x36 Versions Only)
DQ
C1
–
DQ
C9
I/O
I/O
In
In
In
Byte C Data Input and Output pins (x36 Versions Only)
Byte D Data Input and Output pins (x36 Versions Only)
Power down control; active high
Pipeline/Flow Through Mode Control; active low
Linear Burst Order; active low
ZZ
FT
LBO
V
DD
15, 16, 41, 65, 91
In
3.3 V power supply
5,10, 17, 21, 26, 40, 55, 60, 67,
71, 76, 90
V
SS
In
Ground
4, 11, 20, 27, 54, 61, 70, 77
V
DDQ
NC
In
3.3 V output power supply for noise reduction
38, 39, 42, 43, 66
—
No Connect
相關(guān)PDF資料
PDF描述
GS8160Z36 16Mb Pipelined and Flow Through Synchronous NBT SRAM(16M位流水線(xiàn)式和流通型同步NBT靜態(tài)RAM)
GS816118D-133 Pin Strip Header; No. of Contacts:36; Pitch Spacing:0.1"; No. of Rows:2; Contact Material:Copper Alloy; Contact Plating:Gold; Leaded Process Compatible:Yes; Mounting Type:PCB Straight Thru Hole; Peak Reflow Compatible (260 C):No RoHS Compliant: Yes
GS816118D-133I 165 Bump BGA?x18 Commom I/O?Top View (Package D)
GS816118D-150 Pin Strip Header; No. of Contacts:36; Pitch Spacing:0.1"; No. of Rows:2; Contact Material:Copper Alloy; Contact Plating:Gold; Leaded Process Compatible:Yes; Mounting Type:PCB Straight Thru Hole; Peak Reflow Compatible (260 C):No RoHS Compliant: Yes
GS816118D-150I 165 Bump BGA?x18 Commom I/O?Top View (Package D)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GS8160Z18BGT-150 制造商:GSI Technology 功能描述:SRAM SYNC SGL 2.5V/3.3V 18MBIT 1MX18 7.5NS/3.8NS 100TQFP - Trays
GS8160Z18BGT-150I 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 2.5V/3.3V 18MBIT 1MX18 7.5NS/3.8NS 100TQFP - Trays
GS8160Z18BGT-150IT 制造商:GSI 制造商全稱(chēng):GSI Technology 功能描述:18Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8160Z18BGT-150IV 制造商:GSI Technology 功能描述:SRAM SYNC DUAL 1.8V/2.5V 18MBIT 1MX18 7.5NS/3.8NS 100TQFP - Trays
GS8160Z18BGT-150T 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:18Mb Pipelined and Flow Through Synchronous NBT SRAM
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