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參數(shù)資料
| 型號(hào)： | GS8160F36 |
| 廠商： | GSI TECHNOLOGY |
| 英文描述： | 16Mb（256K x 72Bit）Sync Burst SRAM(16M位（256K x 72位）同步靜態(tài)RAM(帶2位脈沖地址計(jì)數(shù)器)) |
| 中文描述： | 16Mb的（256 × 72Bit）同步突發(fā)靜態(tài)存儲(chǔ)器（1,600位（256 × 72位）同步靜態(tài)隨機(jī)存儲(chǔ)器（帶2位脈沖地址計(jì)數(shù)器）） |
| 文件頁數(shù)： | 10/23頁 |
| 文件大?。?/td> | 457K |
| 代理商： | GS8160F36 |
Rev: 2.06 11/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
10/23
1999, Giga Semiconductor, Inc.
Preliminary
GS8160F18/32/36T-7/8/8.5/10/11
Simplified State Diagram with G
First Write
First Read
Burst Write
Burst Read
Deselect
R
W
CR
CW
X
X
W
R
R
W
R
X
X
X
CR
R
CW
CR
CR
W
CW
W
CW
Notes:
1.
2.
The diagram shows supported (tested) synchronous state transitions plus supported transitions that depend upon the use of G.
Use of “Dummy Reads” (Read Cycles with G High) may be used to make the transition from read cycles to write cycles without passing
through a Deselect cycle. Dummy Read cycles increment the address counter just like normal read cycles.
Transitions shown in grey tone assume G has been pulsed high long enough to turn the RAM’s drivers off and for incoming data to meet
Data Input Set Up Time.
3.
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| GS8160Z18T-150 | 18Mb Pipelined and Flow Through Synchronous NBT SRAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS8160F36BGT-5.5 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs |
| GS8160F36BGT-5.5I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs |
| GS8160F36BGT-5.5IV | 制造商:GSI 制造商全稱:GSI Technology 功能描述:1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs |
| GS8160F36BGT-5.5V | 制造商:GSI 制造商全稱:GSI Technology 功能描述:1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs |
| GS8160F36BGT-6.5 | 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 2.5V/3.3V 18MBIT 512KX36 6.5NS 100TQFP - Trays |
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