參數(shù)資料
型號(hào): GS815272
廠商: GSI TECHNOLOGY
英文描述: 16Mb(256K x 72Bit)S/DCD Sync Burst SRAM(16M位(256K x 72位)可選單/雙循環(huán)取消同步靜態(tài)RAM(帶2位脈沖地址計(jì)數(shù)器))
中文描述: 16Mb的(256 × 72Bit)的S /雙氰胺同步突發(fā)靜態(tài)存儲(chǔ)器(1,600位(256 × 72位)可選單/雙循環(huán)取消同步靜態(tài)隨機(jī)存儲(chǔ)器(帶2位脈沖地址計(jì)數(shù)器))
文件頁數(shù): 10/38頁
文件大?。?/td> 824K
代理商: GS815272
Rev: 1.01 11/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
10/38
2000, Giga Semiconductor, Inc.
Preliminary
GS815218/36/72B-225/200/180/166/150/133
Byte Write Truth Table
Notes:
1.
2.
3.
4.
All byte outputs are active in read cycles regardless of the state of Byte Write Enable inputs.
Byte Write Enable inputs B
A
, B
B
, B
C
, and/or B
D
may be used in any combination with BW to write single or multiple bytes.
All byte I/Os remain High-Z during all write operations regardless of the state of Byte Write Enable inputs.
Bytes “
C
” and “
D
” are only available on the x36 version.
Function
GW
BW
B
A
B
B
B
C
B
D
Notes
Read
H
H
X
X
X
X
1
Read
H
L
H
H
H
H
1
Write byte a
H
L
L
H
H
H
2, 3
Write byte b
H
L
H
L
H
H
2, 3
Write byte c
H
L
H
H
L
H
2, 3, 4
Write byte d
H
L
H
H
H
L
2, 3, 4
Write all bytes
H
L
L
L
L
L
2, 3, 4
Write all bytes
L
X
X
X
X
X
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