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參數(shù)資料
| 型號： | GL9714-TGGXX |
| 廠商： | Genesys Logic, Inc. |
| 英文描述： | PCI ExpressTM PIPE x4 PHY |
| 中文描述： | 管x4的PCI ExpressTM物理層 |
| 文件頁數(shù)： | 30/46頁 |
| 文件大?。?/td> | 527K |
| 代理商： | GL9714-TGGXX |
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GL9714 PCI Express
TM
PIPE x4 PHY
2004-2007 Genesys Logic Inc. - All rights reserved.
Page 30
8B/10B Decode Error
When the GL9714 decodes the received 10-bit symbol and detects an error code which does not
correspond to any valid data, it will replace the code with an EDB symbol, assert PHYSTS and encode
RXSTSx[2:0] with the values of decode error status, 3’b100.
Elastic Buffer Overrun and Underrun
When the overrun or underrun of the elastic buffer occurs, the GL9714 will assert PHYSTS and encode
RXSTSx[2:0] with the values of decode error status.
Elastic Buffer
RXSTS Code
Overrun
101b
Underrun
110b
In the case of elastic buffer overrun, the GL9714 drops the symbol. For the elastic buffer underrun, the
GL9714 inserts the EDB symbol. The PHYSTS and RXSTSx[2:0] are presented on the MAC interface
during the clock cycle where GL9714 drops or inserts the symbol.
Disparity Errors
To report a disparity error detected, the GL9714 asserts PHYSTS and encodes RXSTSx[2:0] with the
values of decode error status, 3’b111.
6.5 Loopback
The GL9714 supports a Loopback mode to re-transmit its received data. When the MAC sets the GL9714 in P0
state and asserts TXDET/LPBK, the GL9714 enters a Loopback. In Loopback, the GL9714 transmits data from
it received data instead of MAC interface. Meanwhile, it presents the received data on the MAC interface as
normal operation.
When set into Loopback mode and acting as a Loopback slave according to the PCI Express Base Specification
Rev. 1.0a, the GL9714 received data from the Loopback master. If the master intends to end the Loopback, it
sends an electrical idle ordered-set to the GL9714. When the MAC detects the electrical idle ordered-set, it
de-asserts TXDET/LPBK and asserts TXIDLE to instruct the GL9714 to stop Loopback. The MAC should take
care the GL9714 has retransmit at least three bytes of the electrical idle before it makes the GL9714’s transmitter
into electrical idle.
6.6 Polarity Inversion
The GL9714 supports lane polarity inversion. While pin RXPLRx asserted, the GL9714 inverts its received data
on the MAC interface.
6.7 Setting Negative Disparity
To set the running disparity to negative, the MAC asserts TXCMPx for one PCLK cycle that matches with the
data that is to be transmitted where running disparity is negative.
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