
GL9714 PCI Express
TM
PIPE x4 PHY
2004-2007 Genesys Logic Inc. - All rights reserved.
Page 16
RXDB[7:0]
RXDC[7:0]
RXDD[7:0]
P13, U16, P14, R15,
N14, T16, P15, R16
M2, N3, N1, M4,
R1, P3, P2, N4
C2, F4, E4, E3,
D3, F3, E2, G4
TXDKA~D
SSTL2_I
E15, K16, P7,
L3
I
K-code indication for the transmitted symbols
TXDA[7:0]
TXDB[7:0]
TXDC[7:0]
TXDD[7:0]
SSTL2_I
C17, C16, E14, D15,
D14, E16, C14, D13
N16, L15, N17, M15,
M16, K14, L16, L17
R4, T3, R5, U2,
P6, T4, R6, U4
H3, H2, J3, H1,
J4, J1, K3, K2
I
Parallel data input bus
TXDET/LPBK
LVCMOS2
R11
I
Receiver detection/Loopback
PD[1:0]
LVCMOS2
P10, T11
I
Sets the power states
00 P0, normal operation
01 P0s, low recovery time latency, power
saving state
10 P1, longer recovery time(64us max) latency,
lower power state
11 P2, lowest power state
RXPLRA~D
LVCMOS2
U15, U13, T9,
R8
I
Inverts the polarity on the RXP/RXN
Power and Ground Signals
Pin Name
Pin#
Type
Description
VDD25
D2, D16, F17, G2, K1, K15, P1,
R13, R17,
T2, T5, U9, U17
C4, C10, C12,
D7, H17, J17, L4,
M3, T6
P
2.5V Power Supplies for general I/O
VDD18
P
1.8V Power Supplies for core and bias voltage
VDD12
J14, K4
P
1.25V Reference Voltage for high speed I/O
VSS
D4, D5, F1, G7, G8, G9, G10,
G11, H7, H8, H9, H10, H11, J2,
J7, J8, J9, J10, J11, J15, K7, K8,
K9, K10, K11, L1, L2, L7, L8,
L9, L10, L11, M1, M17, N2, P9,
P16, R7, T15, U1, U3, U14
P
Digital ground
VDDPLL
C8
P
1.8V Power Supplies for internal PLL
VSSPLL
D9
P
Ground for internal PLL
VDDRXA~D
VSSRXA~D
VDDTXA~D
VSSTXA~D
A17, A13, A9,
A5
B17, B13
, B9, B5
A15, A11, A7,
A3
B15, B11,
B7, C7, B3
P
1.8V Power Supplies for receiver part
P
1.8V Power Supplies for transceiver part
VSSGR
C15
P
Ground for the guard ring of the SerDes block
Serial Signals
Pin Name
Pin#
Type
Description
RXNA~D
A16, A12, A8, A4
I
Received serial input, complement
RXPA~D
B16, B12, B8,
B4
I
Received serial input, true
RTERM
D8
I
Connects an external 5.1K
resistor to ground