參數資料
型號: GL860A-PNGXX
廠商: Genesys Logic, Inc.
英文描述: USB 2.0 UVC Camera Controller
中文描述: 紫外線相機的USB 2.0控制器
文件頁數: 14/42頁
文件大小: 1020K
代理商: GL860A-PNGXX
GL860A USB 2.0 UVC Camera Controller
2007 GenesysLogic, Inc. - All rights reserved.
Page 14
CHAPTER 4 REGISTERS
4.1 Registers Base Address
Table 4.1 - Base Address for Registers
Mnemonic
Offset
Description
Default
GP1_DAT
00h
GPIO[7:0] data
--
GP1_INTPOL
01h
Interrupt polarity for GPIO[7:0]
8’h00
GP1_INTEN
02h
Interrupt enable for GPIO[7:0]
8’hFF
GP1_INT
03h
Interrupt indication for GPIO[7:0]
8’h00
ROMFLG
04h
Reserved for internal use.
8’hFF
GP1_OE
06h
Output enable for GPIO[7:0]
8’h00
GP2_DAT
07h
GPIO[14:8] data
--
GP2_INTPOL
08h
Interrupt polarity for GPIO[14:8]
8’h00
GP2_INTEN
09h
Interrupt enable for GPIO[14:8]
8’hFF
GP2_INTEN
0Ah
Interrupt indication for GPIO[14:8]
8’h00
GP2_OE
0Dh
Output enable for GPIO[14:8]
8’h00
GCTL
0Eh
Global control register
8’hFC
INT_MASK
0Fh
Interrupt mask for each sub-module
8’h00
CLKCTL
10h
Sensor clock control
8’h80
CPURST
11h
CPU reset register
8’h00
DEVCTL
40h
USB Device control
8’h04
UEVT1
41h
USB interrupt flag #1
8’h00
UEVT2
42h
USB interrupt flag #2
8’h00
UEVT1EN
43h
USB interrupt #1 enable
8’h00
UEVT2EN
44h
USB interrupt #2 enable
8’h00
UTMCTL
45h
UTMI control
8’h0C
UTMDATL
46h
UTMI data low byte
--
UTMDATH
47h
UTMI data high byte
--
DEVADR
48h
USB device address
8’h00
MISC
49h
Miscellaneous register
8’h10
EPCTL1
4Ah
Endpoint control 1
8’h00
EPCTL2
4Bh
Endpoint control 2
8’h00
EPCTL3
4Ch
Endpoint control 3
8’h00
EP0CTL
4Dh
Endpoint 0 control
8’h40
RX0CNT
4Eh
Endpoint 0 receive length
8’h00
FF0BUF
4Fh
Endpoint 0 FIFO data
8’h00
FF1BUF
50h
Endpoint 1 FIFO data
8’h00
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