參數(shù)資料
型號(hào)： GL842
廠商： Genesys Logic, Inc.
英文描述： USB 2.0 2-in-1 Scanner Controller
中文描述： 個(gè)USB 2.0 2合1掃描儀控制器
文件頁數(shù)： 49/64頁
文件大?。?/td> 542K
代理商： GL842
GL842 USB 2.0 2-in-1 Scanner Controller
Genesys Logic Inc.—All rights reserved.
Page 49
Offset 7Ah ……..……..……………..………..…...………..….………..…..…. Default value = 8’h00
X
X
X
X
X
X
X
X
X
X
X
X
CK4MAP17
CK4MAP16
R/W
R/W
7-2 RESERVED
1-0
CK4MAP[17:16]
CCD clock 4 bits mapping function.
-
Offset 7Bh ……..……..………………..……..…..….………..….………..…..…. Default value = 8’h00
CK4MAP15
CK4MAP14 CK4MAP13 CK4MAP12 CK4MAP11 CK4MAP10 CK4MAP9
CK4MAP8
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7-0 CK4MAP[15:8]
CCD clock 4 bits mapping function.
Offset 7Ch ……..……..……………..………....….………..….………..…..…. Default value = 8’h00
CK4MAP7
CK4MAP6 CK4MAP5 CK4MAP4 CK4MAP3 CK4MAP2 CK4MAP1
CK4MAP0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7-0 CK4MAP[7:0]
CCD clock 4 bits mapping function.
Offset 7Dh ……..……..………………..………..…………..….………..…..…. Default value = 8’h00
CK1NEG
R/W
CK3NEG
R/W
CK4NEG
R/W
RSNEG
R/W
CPNEG
R/W
BSMPNEG VSMPNEG DLYSET
R/W
R/W
R/W
7 CK1NEG
6 CK3NEG
5 CK4NEG
4 RSNEG
3 CPNEG
2 BSMPNEG
1 VSMPNEG
0 DLYSE
T
0 CCD clock1,clock2 output locate at positive edge position of system clock.
1 CCD clock1,clock2 output locate at negative edge position of system clock.
0 CCD clock3 output locate at positive edge position of system clock.
1 CCD clock3 output locate at negative edge position of system clock.
0 CCD clock4 output locate at positive edge position of system clock.
1 CCD clock4 output locate at negative edge position of system clock.
0 CCD RS output locate at positive edge position of system clock.
1 CCD RS output locate at negative edge position of system clock.
0 CCD CP output locate at positive edge position of system clock.
1 CCD CP output locate at negative edge position of system clock.
0 AFE video sample output locate at positive edge position of system clock.
1 AFE video sample output locate at negative edge position of system clock.
0 AFE dark sample output locate at positive edge position of system clock.
1 AFE dark sample output locate at negative edge position of system clock.
0 Disable this function.
1 To enable VSMP and BSMP to delay output by 8.33ns unit
相關(guān)PDF資料
PDF描述
GL843 High Speed USB 2.0 With ADF 2-in-1 Scanner Controller
GL850A USB 2.0 Low-Power HUB Controller
GL850A-MNGXX USB 2.0 Low-Power HUB Controller
GL850A-MNNXX USB 2.0 Low-Power HUB Controller
GL850A-MSGXX USB 2.0 Low-Power HUB Controller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GL843 制造商:GENESYS 制造商全稱:GENESYS 功能描述:High Speed USB 2.0 With ADF 2-in-1 Scanner Controller
GL848 制造商:GENESYS 制造商全稱:GENESYS 功能描述:High Speed USB 2.0
GL850 制造商:未知廠家 制造商全稱:未知廠家 功能描述:USB 2.0 4-PORT HUB Controller
GL850A 制造商:GENESYS 制造商全稱:GENESYS 功能描述:USB 2.0 Low-Power HUB Controller
GL850A-MNGXX 制造商:GENESYS 制造商全稱:GENESYS 功能描述:USB 2.0 Low-Power HUB Controller
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