
16
06/19/2000
GL600USB/GL600USB-A/GL600USB-B
Revision 1.3
Value on POR: “- - 0 - - 0 0 0”
INDAR: (Address 04h/84h, Indirect address register)
R/W
R/W
INDAR7
INDAR6
Any instruction using the INDF register actually accesses the register pointed by the INDAR register.
Value on POR: “x x x x x x x x”
[1]
Note 1: “x” means unknown
PORT1 (Address 06h, Port 1 data register)
R/W
PORT1.4
PORT1 is a 5-bits latch for Port 1.0~Port 1.4. Reading the PORT1 register gets the status of the pins.
Writing to it will write to the port latch. All write operations are read-modify-write operations.
PORT1CON is used to enable/disable every bits of the port latch.
Value on POR: “- - - x x x x x”
PORT2 (Address 07h, Port 2 data register)
R/W
R/W
R/W
R/W
PORT2.7
PORT2.6
PORT2.5
PORT2.4
PORT2 is an 8-bits latch for Port 2.0~Port 2.7. Reading the PORT2 register reads the status of the pins.
Writing to it will write to the port latch. All write operations are read-modify-write operations.
PORT2CON is used to enable/disable every bits of the port latch.
Value on POR: “x x x x x x x x”
PCHBUF (Address 0Ah/8Ah, Write buffer of Program Counter’s bit 10-8)
Write buffer for upper 3-bits of Program Counter. The upper byte of Program Counter is not directly
accessible. PCHBUF is a holding register for the PC[10:8] that are transferred to the upper byte of the
Program Counter when branch occur. Please see PCL register to get more detail information.
Value on POR: “- - - - - 0 0 0”
INTEN (Address 0Bh/8Bh, Interrupt enable register)
R/W
R/W
GIE
TMROEN
GIE: Global interrupt enable bit
1: Enable all interrupts
0: Disable all interrupts
TMROEN: Timer overflow interrupt enable bit
1: Enable timer interrupt
0: Disable timer interrupt
TMROF: Timer overflow interrupt flag bit. This bit should be cleared to ‘0’ by firmware after it is set by
hardware.
1: Timer register has overflowed
0: Timer register did not overflow
Value on POR: “0 - 0 - - 0 - -“
PHVAL (Address 0Dh, Photo-sensor value register)
PHVAL[3:0]: the 8 channel, 4 bits analog-to-digital converter data. The ADC input is select by PHSEL
register from Port 2.0~Port 2.7
R/W
INDAR5
R/W
INDAR4
R/W
INDAR3
R/W
INDAR2
R/W
INDAR1
R/W
INDAR0
R/W
PORT1.3
R/W
PORT1.2
R/W
PORT1.1
R/W
PORT1.0
R/W
PORT2.3
R/W
PORT2.2
R/W
PORT2.1
R/W
PORT2.0
R/W
R/W
R/W
PCHBUF2
PCHBUF1
PCHBUF0
R/W
TMROF
R/O
R/O
R/O
R/O
PHVAL3
PHVAL2
PHVAL1
PHVAL0