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參數(shù)資料
| 型號(hào)： | G781 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | 溫度/濕度傳感器 |
| 英文描述： | 【1∑C Remote and Local Temperature Sensor with SMBus Serial Interface |
| 中文描述： | 【1ΣC遠(yuǎn)程和本地溫度傳感器，帶有SMBus串行接口 |
| 文件頁(yè)數(shù)： | 9/14頁(yè) |
| 文件大?。?/td> | 342K |
| 代理商： | G781 |
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Ver: 1.0
Oct 02, 2002
TEL: 886-3-5788833
http://www.gmt.com.tw
9
Global Mixed-mode Technology Inc.
G781
Slave Address
The G781 appears to the SMBus as one device hav-
ing a common address for both ADC channels. The
G781 device address is set to 1001100.
The G781 also responds to the SMBus Alert Re-
sponse slave address (see the Alert Response Ad-
dress section).
One-Shot Register
The One-shot register is to initiate a single conversion
and comparison cycle when the device is in standby
mode and auto conversion mode. The write operation to
this register causes one-shot conversion and the data
written to it is irrelevant and is not stored.
Serial Bus Interface Reinitialization
When SMBCLK are held low for more than 30ms (typical)
during an SMBus communication the G781 will reinitiate
its bus interface and be ready for a new transmission
.
Alarm Threshold Registers
Four registers store alarm threshold data, with
high-temperature (T
HIGH
) and low-temperature (T
LOW
)
registers for each A/D channel. If either measured
temperature equals or exceeds the corresponding
alarm threshold value, an
ALERT
interrupt is as-
serted.
The power-on-reset (POR) state of both T
HIGH
registers
is full scale (01010101, or +85
°
C). The POR state of
both T
LOW
registers is 0
°
C.
Diode Fault Alarm
There is a fault detector at DXP that detects whether
the remote diode has an open-circuit condition. At the
beginning of each conversion, the diode fault is
checked, and the status byte is updated. This fault de-
tector is a simple voltage detector. If DXP rises above
VCC – 1V (typical) due to the diode current source, a
fault is detected and the device alarms through pulling
ALERT
low while the remote temperature reading
doesn’t update in this condition. Note that the diode
fault isn’t checked until a conversion is initiated, so im-
mediately after power-on reset the status byte indicates
no fault is present, even if the diode path is broken.
If the remote channel is shorted (DXP to DXN or DXP to
GND), the ADC reads 1000 0000(-128
°
C) so as not to
trip either the T
HIGH
or T
LOW
alarms at their POR settings.
ALERT Interrupts
The
ALERT
interrupt output signal is latched and can
only be cleared by reading the Alert Response ad-
dress. Interrupts are generated in response to T
HIGH
and T
LOW
comparisons and when the remote diode is
disconnected (for fault detection). The interrupt does
not halt automatic conversions; new temperature data
continues to be available over the SMBus interface
after
ALERT
is asserted. The interrupt output pin is
open-drain so that devices can share a common in-
terrupt line. The interrupt rate can never exceed the
conversion rate.
The interface responds to the SMBus Alert Response
address, an interrupt pointer return-address feature
(see Alert Response Address section). Prior to taking
corrective action, always check to ensure that an in-
terrupt is valid by reading the current temperature.
Alert Response Address
The SMBus Alert Response interrupt pointer provides
quick fault identification for simple slave devices that
lack the complex, expensive logic needed to be a bus
master. Upon receiving an
ALERT
interrupt signal,
the host master can broadcast a Receive Byte trans-
mission to the Alert Response slave address (0001
100). Then any slave device that generated an inter-
rupt attempts to identify itself by putting its own ad-
dress on the bus (Table 4).
The Alert Response can activate several different
slave devices simultaneously, similar to the SMBus
General Call. If more than one slave attempts to re-
spond, bus arbitration rules apply, and the device with
the lower address code wins. The losing device does
not generate an acknowledge and continues to hold
the
ALERT
line low until serviced (implies that the
host interrupt input is level-sensitive). Successful
reading of the alert response address clears the inter-
rupt latch.
Table 4. Read Format for Alert Response Address
(0001 100)
BIT
7(MSB)
6
5
4
3
2
1
0(LSB)
NAME
ADD7
ADD6
ADD5
ADD4
ADD3
ADD2
ADD1
1
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