參數(shù)資料
型號: FXLA2203UMX
廠商: Fairchild Semiconductor
文件頁數(shù): 3/16頁
文件大?。?/td> 0K
描述: TRANSLATOR LEVEL DUAL 24UMLP
標準包裝: 5,000
應用: 用戶標識模塊(SIM)
電源電壓: 1.65 V ~ 3.6 V
封裝/外殼: 24-UMLP
供應商設備封裝: 24-UMLP
包裝: 帶卷 (TR)
安裝類型: 表面貼裝
2010 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FXLA2203 Rev. 1.0.5
11
FXLA2203
Dual-Mode,
Dual-SI
M-Card
Level
Translator
I/O Pin Function
The ISO7816-3 specification, which governs the SIM
card physical layer requirements, identifies the I/O pin
as a bi-directional open-drain pin. To provide auto-
direction for the I/O pin, the FXLA2203 architecture
(Figure 12) implements two series NpassGates and two
dynamic drivers. This hybrid architecture is highly
beneficial in a SIM card interface.
Figure 12. I/O Pin Functional Diagram
The hybrid bi-directional I/O channel contains two series
NpassGates and two dynamic drivers. This architecture
allows auto-direction functionality without the need for a
direction pin from either the host or the SIM card and
accomplishes an automatic change in direction without
the presence of an edge.
Due to open-drain technology, hosts and SIM cards do
not use push-pull drivers on the I/O pin. Logic LOWs are
pulled down (Isink), while logic HIGHs are “l(fā)et go” (3-
state). During a logic LOW on the I/O pin, both series
NpassGates are turned on and act like a very low
resistive short between the host and the SIM card.
When the host or card lets go of a previously held LOW
on the I/O pin, the rise time is largely determined by the
RC time constant, where R is the internal pull-up
resistor (10K
Ω) and C is the I/O signal trace
capacitance. The FXLA2203 acts as a very low resistive
short between the host and SIM card (during a LOW)
until either of the port’s VCC/2 thresholds are reached.
After the RC time constant has reached the VCC/2
threshold of either port, the port’s edge detector triggers
both dynamic drivers to drive their respective ports in
the LOW-to-HIGH (LH) direction, accelerating the rising
edge. The resulting rise time resembles the CH2
waveform (blue) of Figure 13. Effectively, two distinct
slew rates appear in the rise time. The first slew rate
(slower) is the RC time constant of the I/O signal trace.
The second slew rate (faster) is the dynamic driver
accelerating edge.
If both the host and card ports of the I/O pin are HIGH, a
high-impedance path exists between the host and card
ports because both of the series NpassGates are turned
off. If a host or SIM card pulls the I/O pin LOW, that
device’s driver pulls down (Isink) the I/O pin until the
HIGH-to-LOW (HL) edge reaches the host or card port’s
VCC/2 threshold. When either the host or card port
threshold is reached, the port’s edge detectors trigger
both dynamic drivers to drive their ports in the HIGH-to-
LOW (HL) direction, accelerating the falling edge.
Figure 13.Scope Shot of I/O and Clock Signals
CH1: CLK Pin (Yellow), CH2: I/O PIN (Blue)
Driven by the FXLA2203
Activation / Deactivation
To ensure the SIM card electrical circuits do not activate
before the contacts of the SIM card are mechanically
connected, ISO7816-3 2006 mandates the activation
sequence of events described in Figure 14. The
FXLA2203 provides full transparency to the activation
timing between host and SIM card.
Figure 14.Activation Timing (ISO 7816-3 2006)
To ensure the SIM card electrical circuits properly
deactivate before the contacts of the SIM card are
mechanically connected, ISO7816-3 2006 mandates the
sequence of events described in Figure 15 The
FXLA2203 provides full transparency to the deactivation
timing between host and SIM card.
Figure 15. Deactivation (ISO 7816-3 2006)
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