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參數(shù)資料
| 型號： | FVB Series |
| 英文描述： | Flash Memory Card (AMD based) 4, 8, 16 MB(4, 8, 16 M字節(jié)閃速存儲(chǔ)器卡（基于AMD）) |
| 中文描述： | 閃存卡（基于AMD）4，8，16 MB的（4，8，16米字節(jié)閃速存儲(chǔ)器卡（基于AMD）的） |
| 文件頁數(shù)： | 3/11頁 |
| 文件大小： | 111K |
| 代理商： | FVB SERIES |
August 2000 Rev. 3 - ECO #13135
3
PCMCIA Flash Memory Card
FVB Series
PC Card Products
Symbol
A0 - A25
Type
Name and Function
INPUT
ADDRESS INPUTS:
A0 through A25 enable direct addressing of
up to 64MB of memory on the card. Signal A0 is not decoded since
the card is x16 only. The memory will wrap at the card density
boundary. The system should not try to access memory beyond the
card density. The upper addresses are not connected.
DATA INPUT/OUTPUT:
DQ0 THROUGH DQ15 constitute the
bi-directional databus. DQ0 - DQ7 constitute the lower (even) byte
and DQ8 - DQ15 the upper (odd) byte. DQ15 is the MSB.
CARD ENABLE 1 AND 2:
CE1# enables even byte accesses, CE2#
enables odd byte accesses. Odd byte (DQ8 - DQ15) can not be
accessed on DQ0 - DQ7.
OUTPUT ENABLE:
Active low signal enabling read data from the
memory card.
WRITE ENABLE:
Active low signal gating write data to the
memory card.
READY/BUSY OUTPUT:
Indicates status of internally timed erase
or program algorithms. A high output indicates that the card is ready
to accept accesses. Open Drain output, pull-up resistor is required.
CARD DETECT 1 and 2:
Provide card insertion detection. These
signals are connected to ground internally on the memory card. The
host socket interface circuitry shall supply 10K-ohm or larger pull-up
resistors on these signal pins.
WRITE PROTECT:
This signal is pulled low internally. This
signifies write protect = "off " for all cases.
PROGRAM/ERASE POWER SUPPLY:
Not connected for 5V
only card.
CARD POWER SUPPLY:
5.0V for all internal circuitry.
GROUND:
for all internal circuitry.
ATTRIBUTE MEMORY SELECT :
only used with cards built
with optional attribute memory.
RESET:
Active high signal for placing card in Power-on default
state. Reset can be used as a Power-Down signal for the memory
array.
WAIT:
This signal is pulled high internally for compatibility. No
wait states are generated.
BATTERY VOLTAGE DETECT:
These signals are pulled high to
maintain SRAM card compatibility.
VOLTAGE SENSE:
Notifies the host socket of the card's VCC
requirements. VS1 and VS2 are open to indicate a 5V, 16 bit card
has been inserted.
RESERVED FOR FUTURE USE
NO INTERNAL CONNECTION TO CARD:
pin may be driven
or left floating
DQ0 - DQ15
INPUT/OUTP
UT
CE1#, CE2#
INPUT
OE#
INPUT
WE#
INPUT
RDY/BSY#
OUTPUT
CD1#, CD2#
OUTPUT
WP
OUTPUT
VPP1, VPP2
N.C.
VCC
GND
REG#
INPUT
RST
INPUT
WAIT#
OUTPUT
BVD1, BVD2
OUTPUT
VS1, VS2
OUTPUT
RFU
N.C.
Card Signal Description
READ function
Common Memory
Attribute Memory
Function Mode
Standby Mode
Low Byte Access
Word Access (16 bits)
Odd-Byte Only Access
WRITE function
/CE2
H
H
L
L
/CE1
H
L
L
H
/OE
X
L
L
L
/WE
X
H
H
H
/REG
X
H
H
H
D15-D8
High-Z
High-Z
Odd-Byte Even-Byte
Odd-Byte
D7-D0
High-Z
Even-Byte
/REG
X
L
L
L
D15-D8
High-Z
High-Z
Not Valid
Not Valid
D7-D0
High-Z
Even-Byte
Even-Byte
High-Z
High-Z
Standby Mode
Low Byte Access
Word Access (16 bits)
Odd-Byte Only Access
H
H
L
L
H
L
L
H
X
H
H
H
X
L
L
L
X
H
H
H
X
X
X
X
L
L
L
X
X
X
X
X
Even-Byte
Even-Byte
Even-Byte
X
Odd-Byte Even-Byte
Odd-Byte
X
Functional Truth Table
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