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參數(shù)資料

型號(hào)：	FT232HL-REEL
廠商：	FTDI, Future Technology Devices International Ltd
文件頁(yè)數(shù)：	27/65頁(yè)
文件大?。?/td>	0K
描述：	IC HS USB TO UART/FIFO 48LQFP
應(yīng)用說(shuō)明：	FT1248 Application Note
標(biāo)準(zhǔn)包裝：	1
通道數(shù)：	1，UART
FIFO's：	4kb
規(guī)程：	RS232，RS422，RS485
電源電壓：	1.62 V ~ 1.98 V，2.97 V ~ 3.63 V
帶并行端口：	是
帶故障啟動(dòng)位檢測(cè)功能：	是
帶調(diào)制解調(diào)器控制功能：	是
安裝類型：	表面貼裝
封裝/外殼：	48-LQFP
供應(yīng)商設(shè)備封裝：	48-LQFP（7x7）
包裝：	標(biāo)準(zhǔn)包裝
其它名稱：	768-1101-6

Document No.: FT_000288

FT232H SINGLE CHANNEL HI-SPEED USB TO MULTIPURPOSE UART/FIFO IC

Datasheet Version 1.8

Clearance No.: FTDI #199

When SS_n is inactive the write buffer and read buffer status is reflected on the MIOSIO[0] and MISO

signals respectively. When the master wishes to initiate a data transfer, SS_n becomes active. As soon as

SS_n becomes active the SPI slave immediately stops driving the MIOSIO[0] signal and SPI master is not

allowed to begin driving the MIOSIO[0] signal until the first clock edge, this ensures that bus contention

is avoided.

On the first clock edge the command is shifted out for 7 clocks, on the 8th clock cycle a bus turnaround is

required. The bus turnaround is required as the slave may be required to drive the MIOSIO[0] bus with

read data. The data phase occurs in response to the command and so long as SS_n remains active. The

data phase in 1-bit mode requires 8 clock cycles where the MIOSIO[0] signal transfers the requested

write or read data. The MISO signal indicates to the master the success of the transfer with an ACK or

NAK.

The status is reflected through the whole of the data phase and is valid from the first clock edge. If the

master is writing data to the slave, then on the last clock edge before it de-asserts SS_n must tri-state

the MIOSIO[0] signal to enable the bus to be “turned” around as when SS_n becomes inactive the

FT1248 slave shall begin to drive the write buffer status onto the MIOSIO[0] signal. When the SPI slave

is driving the MIOSIO[0] (the master is reading data) no bus turnaround is required as when SS_n

becomes inactive it is required to drive the write buffer status to the FT1248 master.

相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
FT232HL-TRAY	功能描述:USB 接口集成電路 USB HS to UART/FIFO SPI/JTAG/I2C LQFP-48 RoHS:否制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
FT232HQ-REEL	功能描述:USB 接口集成電路 USB HS to UART/FIFO SPI/JTAG/I2C QFN-48 RoHS:否制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
FT232HQ-TRAY	功能描述:USB 接口集成電路 USB HS to UART/FIFO SPI/JTAG/I2C QFN-48 RoHS:否制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
FT232R	制造商:FTDI 制造商全稱:FTDI 功能描述:USB UART IC - Single chip USB to asynchronous serial data transfer interface
FT232R_10	制造商:FTDI 制造商全稱:FTDI 功能描述:USB UART IC - Single chip USB to asynchronous serial data transfer interface

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