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參數(shù)資料
| 型號： | FSSD07UMX_F113 |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 2/14頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MUX SD/SDIO MMC 75MHZ 24-MLP |
| 標(biāo)準(zhǔn)包裝： | 5,000 |
| 類型： | 多路復(fù)用器 |
| 應(yīng)用： | 手機(jī)，數(shù)碼相機(jī)，媒體播放器 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-UFQFN |
| 供應(yīng)商設(shè)備封裝： | 24-UMLP |
| 包裝： | 帶卷 (TR) |
2007 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FSSD07 Rev. 1.0.2
10
FSSD07
—
1-Bit
/
4-Bit
SD/SDIO
and
MMC
Dual-Host
Multiplexer
Test Diagrams
Select
nDAT[3:0],nCMD
DAT[3:0],CMD
VS= 0 orVDDH
I
ON
V
ON
RON = VON /ION
GND
VIN
GND
Select
DAT[3:0],CMD
VS
I
ON
V
ON
GND
VIN
GND
VIN
GND
Select
VS= 0 or VDDH
NC
A
IOZ
VIN
GND
IOZ
VIN
GND
VIN
GND
Each switch port tested separately.
Figure 5. On Resistance
Figure 6. Off Leakage
R
L ,R
S,and CL are functions of the application
environment (see AC tables for specific values).
C
L includes test fixture and stray capacitance.
CL
RL
GND
RS
VS
VSW
GND
V
OUT
DAT[3:0],
CMD
nDAT[3:0],nCMD
VDDx
V
OUT
V
tRISE = 2.5ns
GND
Vddx
90%
10%
tFALL = 2.5ns
Vddx /2
Input - VCNTRL
Output - VOUT
50%
VOH
VOL
tOFF
tON
+0.15V
Output - VOUT
50%
VOL
tON
tOFF
+0.15V
VOH
VOL
Figure 7. AC Test Circuit Load
Figure 8. Turn On/Off Time Waveforms
tRISE=2.5ns
GND
Vddx
90%
10%
tFALL =2.5ns
Vddx /2
Vddx/2
Input - V
SW
Output- V
OUT
50%
VOH
VOL
tpLH
tpHL
RISE
tFALL
/2
Vddx/2
-
pLH
pHL
/2
-
Figure 9. Switch Propagation Delay (tPD) Waveform
Figure 10. AC Test Circuit Load (CLK)
R
L , R
Sand CL are function of application
environment (see AC Tables for specific
values)
C
L includes test fixture and stray capacitance
CL
GND
RS
VS
VCLKI
GND
V
OUT
CLK
1CLK, 2CLK
R
L , R
Sand CL are function of application
environment (see AC Tables for specific
values)
C
L includes test fixture and stray capacitance
CL
GND
RS
VS
VCLKI
GND
VCLKI
GND
V
OUT
V
OUT
CLK
1CLK, 2CLK
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