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參數(shù)資料
| 型號(hào)： | FPD63310 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | UNIVERSAL INTERFACE XGA PANEL TIMING CONTROLLER REDUCED SWING DIFFERENTIAL SIGNALING |
| 中文描述： | 通用接口控制器的XGA面板定時(shí)低擺幅差分信號(hào) |
| 文件頁(yè)數(shù)： | 1/2頁(yè) |
| 文件大?。?/td> | 38K |
| 代理商： | FPD63310 |
1997 NSC
1
http://www.national.com
FPD63310
Universal Interface XGA Panel Timing Controller (UI-XPAT)
Reduced Swing Differential Signaling (RSDS )
General Description
The FPD63310 is the first TFT-LCD timing controller that
combines at TTL single pixel system interface with Nation-
al’s Reduced Swing Differential Signaling (RSDS) source
driver interface. It resides on the TFT-LCD panel and pro-
vides the data buffering and control signal generation for
XGA and SVGA TFT-LCD panels.
The RSDS path to the source or column drivers contributes
toward lowing radiated EMI, reducing system power con-
sumption and eliminates one of the pixel busses used in typ-
ical XGA TFT-LCD panels today.
This single 9-bit differential bus conveys the 18-bit color data
for XGA panels at 130Mb/s when using VESA 60Hz stand-
ard timing.
With the addition of a single National DS90CF364 or 564
FPD-LINK
TM
chip, the entire data path is optimized for re-
duced EMI, power consumption and width..
Feature
I
Reduced Swing Differential Signaling (RSDS)
TM
source
driver bus for low power and reduced EMI
I
Universal TTL single pixel system interface
I
Drives National Semiconductor RSDS Column Drivers
at 130Mb/s with a 65 MHz clock
I
Optional EEPROM programming allows fine tuning in
development and production environments.
I
Ability to drive SVGA XGA TFT-LCD Systems
I
Narrow 9-bit differential Source Driver bus minimizes
width of Source PCB
I
CMOS circuitry operates from a 3.3V supply
.
I
f
FPD-LINK
TM
is a trademark of National Semiconductor
System Diagram
Gray scale
Reference
FPD63310
XGA Panel
Timing
Controller
NM93CSxxL
Serial EEPROM
D
/
F
Panel Power
Supply
/2 Link1
/2 Link2
/2 Link3
/2 LinkC
LMC7532
LMC7532
LMC7532
LMC7532
1024 X 768 or 800 X 600
TFT-LCD Array
VDD
VSS
R
*
R
*
Start Pulse
Start Pulse
G
Inversion
Control
/9 + CLK, RSDS BUS
Line Transfer Signal
Gray Scale Voltage Reference BUS
1
n
1
n
1
n
1
n
A1
An
E1
En
*: Row Driver; LM7403(National Semiconductor)
TMS57600, 1, 4(Texas Instrument)
uPD16650, 2, 4(NEC)
ADVANCED INFORMATION
NOV, 1997
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