
F
6
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FM93C86A Rev. A
1024 by 16-Bit Organization
(FM93C86A when ORG = V
CC
or NC)
Instruction
SB
Op Code
2 Bits
Address
10 Bits
Data
16 Bits
Function
READ
1
10
A9
–
A0
Read data stored in selected registers.
EWEN
1
00
11XXXXXXXX
Enables programming modes.
EWDS
1
00
00XXXXXXXX
Disables all programming modes.
ERASE
1
11
A9
–
A0
Erases selected register.
WRITE
1
01
A9
–
A0
D15
–
D0
Writes data pattern D15
–
D0 into selected register.
ERAL
1
00
10XXXXXXXX
Erases all registers.
WRAL
1
00
01XXXXXXXX
D15
–
D0
Writes data pattern D15
–
D0 into all registers.
X = Don't care.
2048 by 8-Bit Organization
(FM93C86A when ORG = GND)
Instruction
SB
Op Code
2 Bits
Address
11 Bits
Data
8 Bits
Function
READ
1
10
A10
–
A0
Read data stored in selected registers.
EWEN
1
00
11XXXXXXXXX
Enables programming modes.
EWDS
1
00
00XXXXXXXXX
Disables all programming modes.
ERASE
1
11
A10
–
A0
Erases selected register.
WRITE
1
01
A10
–
A0
D7
–
D0
Writes data pattern D7
–
D0 into selected register.
ERAL
1
00
10XXXXXXXXX
Erases all registers.
WRAL
1
00
01XXXXXXXXX
D7
–
D0
Writes data pattern D7
–
D0 into all registers.
X = Don't care.
Functional Description
Programming
The programming cycle is automatically started after entering the
LAST bit of the programming instruction string (unlike other
Microwire family members which use the falling edge of CS to
initiate programming). This feature, counting the number of in-
struction bits, decreases the likelihood of inadvertent program-
ming and allows the programming to be cancelled before sending
out the last bit in the string (by bringing CS low).
Programming Instruction
Last Bit in String
WRITE
D0
WRAL
D0
ERASE
A0
ERAL
A0
Note that, in the ERASE/ERAL instructions, the A0 bit is the last
bit in the string and clocking in that bit will initiate programming. In
order to maintain compatibility,
CS may be brought low after
clocking in the last bit, but it is not necessary.
In all programming modes the READY/BUSY status of the device
can be determined by polling the DO pin. After clocking in the last
bit of the instruction sequence and with the CS held
“
high
”
, the DO
pin will exit the high impedance state and indicate the READY/
BUSY status of the device. DO = logical
“
0
”
indicates that program-
ming is still in progress and no other instruction can be executed.
DO = logical
“
1
”
indicates that the device is READY for another
instruction. If CS is forced
“
low
”
the DO pin will return to the high
impedance state. After the programming cycle has been com-
pleted and DO = logical
“
1
”
, the DO pin can be reset back to the
high impedance state by clocking a logical
“
1
”
into the DI pin. (This
is also performed with the start bit on all op codes, thus clocking
an instruction has the same effect.)
Read (READ)
The READ instruction outputs serial data on the DO pin. After a
READ instruction is received, the instruction and address are
decoded, followed by data transfer from the selected memory
register into a serial-out shift register. A dummy bit (logical 0)
precedes the serial data output string. Output data changes are
initiated by a low to high transition of SK clock after the last address
bit (A0) is clocked in.
Erase/Write Enable (EWEN)
When V
is applied to the part, it
“
powers up
”
in the Erase/Write
Disable (EWDS) state. Therefore, all programming modes must
be preceded by an Erase/Write Enable (EWEN) instruction. Once
an Erase/Write Enable instruction is executed, programming
remains enabled until an Erase/Write Disable (EWDS) instruction
is executed or V
CC
is removed from the part.