參數(shù)資料
型號(hào): FM32256-G
廠商: Electronic Theatre Controls, Inc.
英文描述: Integrated Processor Companion with Memory
中文描述: 綜合處理器與記憶體伴侶
文件頁(yè)數(shù): 18/20頁(yè)
文件大小: 285K
代理商: FM32256-G
AC Test Conditions
Input Pulse Levels
Input rise and fall times
Input and output timing levels
Diagram Notes
All start and stop timing parameters apply to both read and write
cycles. Clock specifications are identical for read and write cycles.
Write timing parameters apply to slave address, word address, and
write data bits. Functional relationships are illustrated in the relevant
data sheet sections. These diagrams illustrate the timing parameters
only.
Read Bus Timing
FM3204/16/64/256
Rev 2.1
Dec. 2004
Page 18 of 20
Equivalent AC Load Circuit
0.1 V
DD
to 0.9 V
DD
10 ns
0.5 V
DD
t
SU:SDA
Start
t
R
`
t
F
Stop Start
t
BUF
t
HIGH
1/fSCL
t
LOW
t
SP
t
SP
Acknowledge
t
HD:DAT
t
SU:DAT
t
AA
t
DH
SCL
SDA
Write Bus Timing
t
SU:STO
Start
Stop Start
Acknowledge
t
AA
t
HD:DAT
t
HD:STA
t
SU:DAT
SCL
SDA
/RST Timing
VDD
VTP
VRST
RST
t
RPU
t
RNR
5.5V
Output
1700
100 pF
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