
3
2001 Semtech Corp.
www.semtech.com
PROTECTION PRODUCTS
SI00-06
Surging Ideas
TVS Diode Application Note
to optimize the process.
A properly designed stencil is key to achieving
adequate solder volume without compromising
assembly yields. A laser cut, electro-polished stencil
with 0.275mm square apertures and rounded corners
was used for paste application. The electro-polished
stencil ensures tapering aperture walls that facilitate
uniform deposition. The thickness of the stencil also
affects solder volume. A 0.100 mm thick stencil yields
good results.
Automatic pick and place equipment with optical
component centering is used to place the devices on
the board. The placement height should be
programmed to adjust for the height of the device.
The mechanical pick-up and placement force must be
minimized to avoid any damage to the solder balls.
Insufficient force however will prevent the solder balls
from making contact with the pads. The placement
force used to assemble the Semtech evaluation
boards was 12 pounds/square inch. The devices are
picked from tape and reel. Assembly parameters are
listed in Table 1.
Reflow Profile
The flip chip TVS can be assembled using standard
SMT reflow processes. Semtech’s evaluation boards
were reflowed in an IR convection oven. As with any
component, thermal profiles at specific board locations
can vary and must be determined by the manufacturer.
The flip chip TVS peak reflow temperature is 230
±
10
°C. Time above eutectic temperature (183 °C)
should be 50
± 10 seconds. During reflow, the
component will self-align itself on the pad. The solder
bumps will uniformly collapse and form a cohesive
shiny solder joint.
Underfill
Underfill epoxy is designed to enhance thermal
performance and give greater mechanical protection to
flip chip, CSP and BGA components. The need to
underfill can depend upon several factors including the
physical size of the device. Semtech has achieved
reliable results without the use of underfill material.
The reliability data reported below is for boards built
with no underfill material.
Temperature Cycle
Temperature cycling is one of the most critical tests for
this type of device. It is designed to test the
mechanical integrity of the solder bump to package
and solder bump to board interfaces. The devices
were temperature cycled from –40 to +125
°C. This
temperature range is more severe than the generally
used temperature range of 0 to +100
°C for
commercial devices. It was chosen to model the worst
case conditions and operating environments.
Temperature cycle testing results are available upon
request. In all cases, the devices passed >1000
cycles before the first failure occurred.
High Temperature Operating Life (HTOL)
High temperature operating life is designed to
accelerate failures due to process contamination as
well as the effects of electromigration on the solder
bump/UBM interface. The test involves simulating the
worst case operating environment by biasing the
devices at the working voltage at an elevated
temperature of 125°C for 1,000 hours. All lots tested
to date have passed with zero failures after 1000
hours of testing.
Figure 3 - Reflow Profile