參數(shù)資料
型號: FDS7788
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 小信號晶體管
英文描述: 30V N-Channel PowerTrench MOSFET
中文描述: 18000 mA, 30 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET
封裝: SO-8
文件頁數(shù): 2/5頁
文件大?。?/td> 148K
代理商: FDS7788
FDS7788 Rev E (W)
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Test Conditions
Symbol
Parameter
Min
Typ Max Units
Off Characteristics
BV
DSS
Drain–Source Breakdown Voltage
BV
DSS
T
J
Coefficient
I
DSS
Zero Gate Voltage Drain Current
I
GSSF
Gate–Body Leakage, Forward
I
GSSR
Gate–Body Leakage, Reverse
V
GS
= 0 V, I
D
= 250
μ
A
I
D
= 250
μ
A, Referenced to 25
°
C
V
DS
= 24 V, V
GS
= 0 V
V
GS
= 20 V, V
DS
= 0 V
V
GS
= –20 V, V
DS
= 0 V
30
V
Breakdown Voltage Temperature
25
mV/
°
C
μ
A
nA
nA
10
100
–100
On Characteristics
V
GS(th)
Gate Threshold Voltage
V
GS(th)
T
J
Temperature Coefficient
R
DS(on)
Static Drain–Source
On–Resistance
(Note 2)
V
DS
= V
GS
, I
D
= 250
μ
A
I
D
= 250
μ
A, Referenced to 25
°
C
V
GS
= 10 V, I
D
= 18 A
V
GS
= 4.5 V, I
D
= 17 A
V
GS
= 10 V, I
D
= 18 A, T
J
= 125
°
C
V
GS
= 10 V, V
DS
= 5 V
V
DS
= 10 V, I
D
= 18 A
1
1.9
–5.4
3.0
3.8
4.3
112
3
V
Gate Threshold Voltage
mV/
°
C
m
4.0
5.0
6.3
I
D(on)
g
FS
On–State Drain Current
Forward Transconductance
30
A
S
Dynamic Characteristics
C
iss
C
oss
C
rss
R
G
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
3845
930
368
1.4
pF
pF
pF
V
DS
= 15 V,
f = 1.0 MHz
V
GS
= 0 V,
V
GS
= 15 mV, f = 1.0 MHz
Switching Characteristics
(Note 2)
t
d(on)
Turn–On Delay Time
t
r
Turn–On Rise Time
t
d(off)
Turn–Off Delay Time
t
f
Turn–Off Fall Time
Q
g
Total Gate Charge
Q
gs
Gate–Source Charge
Q
gd
Gate–Drain Charge
15
13
62
36
37
10
14
27
23
99
58
48
ns
ns
ns
ns
nC
nC
nC
V
DD
= 15 V,
V
GS
= 10 V, R
GEN
= 6
I
D
= 1 A,
V
DS
= 15 V,
V
GS
= 5.0 V
I
D
= 18 A,
Drain–Source Diode Characteristics and Maximum Ratings
Drain–Source Diode Forward
Voltage
t
rr
Diode Reverse Recovery Time
Q
rr
Diode Reverse Recovery Charge
V
SD
V
GS
= 0 V,
I
S
= 2.1 A
(Note 2)
0.7
1.2
V
39
33
nS
nC
I
F
= 18 A,
d
iF
/d
t
= 100 A/μs
Notes:
1.
R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
θ
JC
is guaranteed by design while R
θ
CA
is determined by the user's board design.
a) 50°C/W when
mounted on a 1in
2
pad of 2 oz copper
b) 105°C/W when
mounted on a .04 in
2
pad of 2 oz copper
c) 125°C/W when mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2.
Pulse Test: Pulse Width < 300
μ
s, Duty Cycle < 2.0%
F
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