參數(shù)資料
型號： FDG8842CZ
廠商： FAIRCHILD SEMICONDUCTOR CORP
元件分類： 小信號晶體管
英文描述： Complementary PowerTrench㈢ MOSFET
中文描述： 750 mA, 30 V, 2 CHANNEL, N AND P-CHANNEL, Si, SMALL SIGNAL, MOSFET
封裝： ROHS COMPLIANT, SC-70, 6 PIN
文件頁數(shù)： 2/8頁
文件大?。?/td> 458K
代理商： FDG8842CZ
F
M
www.fairchildsemi.com
2
2007 Fairchild Semiconductor Corporation
FDG8842CZ Rev.B
Electrical Characteristics
T
J
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Type
Min
Typ
Max
Units
Off Characteristics
BV
DSS
Drain to Source Breakdown
Voltage
Breakdown Voltage Temperature
Coefficient
I
D
= 250
μ
A, V
GS
= 0V
I
D
= –250
μ
A, V
GS
= 0V
I
D
= 250
μ
A, referenced to 25°C
I
D
= –250
μ
A, referenced to 25°C
V
DS
= 24V, V
GS
= 0V
V
DS
= –20V, V
GS
= 0V
V
GS
= ±12V, V
DS
= 0V
V
GS
= –8V, V
DS
= 0V
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
30
–25
V
Δ
BV
DSS
Δ
T
J
25
–21
mV/°
C
I
DSS
Zero Gate Voltage Drain Current
1
–1
±10
–100
μ
A
I
GSS
Gate to Source Leakage Current
μ
A
nA
On Characteristics
V
GS(th)
Gate to Source Threshold Voltage
V
GS
= V
DS
, I
D
= 250
μ
A
V
GS
= V
DS
, I
D
= –250
μ
A
I
D
= 250
μ
A, referenced to 25°C
I
D
= –250
μ
A, referenced to 25°C
V
GS
= 4.5V, I
D
= 0.75A
V
GS
= 2.7V, I
D
= 0.67A
V
GS
= 4.5V, I
D
= 0.75A ,T
J
= 125°C
V
GS
= –4.5V, I
D
= –0.41A
V
GS
= –2.7V, I
D
= –0.25A
V
GS
= –4.5V, I
D
= –0.41A ,T
J
= 125°C
V
DS
= 5V, I
D
= 0.75A
V
DS
= –5V, I
D
= –0.41A
Q1
Q2
Q1
Q2
0.65
–0.65
1.0
–0.8
–3.0
1.8
0.25
0.29
0.36
0.87
1.20
1.22
3
8
1.5
–1.5
V
Δ
V
GS(th)
Δ
T
J
Gate to Source Threshold Voltage
Temperature Coefficient
mV/°C
r
DS(on)
Static Drain to Source On
Resistance
Q1
0.4
0.5
0.6
1.1
1.5
1.9
Ω
Q2
g
FS
Forward Transconductance
Q1
Q2
S
Dynamic Characteristics
C
iss
Input Capacitance
Q1
V
DS
= 10V, V
GS
= 0V, f= 1MHZ
Q2
V
DS
= –10V, V
GS
= 0V, f= 1MHZ
Q1
Q2
Q1
Q2
Q1
Q2
90
70
20
30
15
15
120
100
30
40
25
25
pF
C
oss
Output Capacitance
pF
C
rss
Reverse Transfer Capacitance
pF
Switching Characteristics
t
d(on)
Turn-On Delay Time
Q1
V
DD
= 5V, I
D
= 0.5A,
V
GS
= 4.5V,R
GEN
= 6
Ω
Q2
V
DD
= –5V, I
D
= –0.5A,
V
GS
= –4.5V,R
GEN
= 6
Ω
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
4
6
1
10
12
10
29
18
56
10
64
1.44
1.68
ns
t
r
Rise Time
16
9
35
1
40
1.03
1.20
0.29
0.31
0.17
0.22
ns
t
d(off)
Turn-Off Delay Time
ns
t
f
Fall Time
ns
Q
g
Total Gate Charge
Q1
V
GS
=4.5V, V
DD
= 5V, I
D
= 0.75A
Q2
V
GS
= –4.5V, V
DD
= –5V, I
D
= –0.41A
nC
Q
gs
Gate to Source Charge
nC
Q
gd
Gate to Drain “Miller” Charge
nC
(note 2)
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