2004 Fairchild Semiconductor Corporation
FDB24AN06LA0 / FDP24AN06LA0 Rev. A
F
PSPICE Electrical Model
.SUBCKT FDB24AN06LA0 / FDP24AN06LA0 2 1 3 ; rev January 2004
Ca 12 8 4.7e-10
Cb 15 14 8.7e-10
Cin 6 8 1.75e-9
Dbody 7 5 DbodyMOD
Dbreak 5 11 DbreakMOD
Dplcap 10 5 DplcapMOD
Ebreak 11 7 17 18 65.4
Eds 14 8 5 8 1
Egs 13 8 6 8 1
Esg 6 10 6 8 1
Evthres 6 21 19 8 1
Evtemp 20 6 18 22 1
It 8 17 1
Lgate 1 9 8.14e-9
Ldrain 2 5 1.0e-9
Lsource 3 7 3.32e-9
RLgate 1 9 81.4
RLdrain 2 5 10
RLsource 3 7 33.2
Mmed 16 6 8 8 MmedMOD
Mstro 16 6 8 8 MstroMOD
Mweak 16 21 8 8 MweakMOD
Rbreak 17 18 RbreakMOD 1
Rdrain 50 16 RdrainMOD 3.5e-3
Rgate 9 20 3.56
RSLC1 5 51 RSLCMOD 1e-6
RSLC2 5 50 1e3
Rsource 8 7 RsourceMOD 8.0e-3
Rvthres 22 8 RvthresMOD 1
Rvtemp 18 19 RvtempMOD 1
S1a 6 12 13 8 S1AMOD
S1b 13 12 13 8 S1BMOD
S2a 6 15 14 13 S2AMOD
S2b 13 15 14 13 S2BMOD
Vbat 22 19 DC 1
ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*150),2.5))}
.MODEL DbodyMOD D (IS=9.3E-12 RS=2.7e-3 IKF=0.9 TRS1=1.1e-3 TRS2=2e-7
+ CJO=6.2e-10 M=0.57 TT=1.1e-8 XTI=1.2)
.MODEL DbreakMOD D (RS=1.1 TRS1=2.4e-3 TRS2=-2.0e-5)
.MODEL DplcapMOD D (CJO=4.9e-10 IS=1e-30 N=10 M=0.58)
.MODEL MmedMOD NMOS (VTO=1.7 KP=2.2 IS=1e-30 N=10 TOX=1 L=1u W=1u RG=3.56 T_ABS=25)
.MODEL MstroMOD NMOS (VTO=2.04 KP=69 IS=1e-30 N=10 TOX=1 L=1u W=1u T_ABS=25)
.MODEL MweakMOD NMOS (VTO=1.45 KP=0.05 IS=1e-30 N=10 TOX=1 L=1u W=1u RG=35.6 RS=0.1 T_ABS=25)
.MODEL RbreakMOD RES (TC1=8.8e-4 TC2=-8.3e-7)
.MODEL RdrainMOD RES (TC1=1.0e-2 TC2=3.7e-5)
.MODEL RSLCMOD RES (TC1=4.5e-3 TC2=6.5e-6)
.MODEL RsourceMOD RES (TC1=8.0e-3 TC2=1.0e-6)
.MODEL RvthresMOD RES (TC1=-2.9e-3 TC2=-9.0e-6)
.MODEL RvtempMOD RES (TC1=-2.0e-3 TC2=1.0e-8)
MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-6.0 VOFF=-3.0)
.MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-3.0 VOFF=-6.0)
.MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-0.4 VOFF=0.3)
.MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=0.3 VOFF=-0.4)
.ENDS
Note: For further discussion of the PSPICE model, consult
A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global
Temperature Options
; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank
Wheatley.
18
22
+
-
6
8
+
-
5
51
+
-
19
8
+
-
17
18
-
6
8
+
-
5
8
+
-
RBREAK
RVTEMP
19
VBAT
RVTHRES
IT
17
18
22
12
13
15
S1A
S1B
S2A
S2B
CA
CB
EGS
EDS
14
8
13
8
14
13
MWEAK
EBREAK
DBODY
RSOURCE
SOURCE
3
11
7
LSOURCE
RLSOURCE
CIN
RDRAIN
EVTHRES
16
21
8
MMED
MSTRO
DRAIN
2
LDRAIN
RLDRAIN
DBREAK
DPLCAP
ESLC
RSLC1
51
10
5
50
RSLC2
1
GATE
RGATE
EVTEMP
9
ESG
LGATE
RLGATE
20
+
-
+
6