參數(shù)資料
型號: FBL22041BB
廠商: NXP SEMICONDUCTORS
元件分類: 通用總線功能
英文描述: 3.3V BTL 7-bit Futurebus transceiver standard A-port
中文描述: FBL SERIES, 7-BIT TRANSCEIVER, INVERTED OUTPUT, PQFP52
文件頁數(shù): 9/14頁
文件大?。?/td> 93K
代理商: FBL22041BB
Philips Semiconductors
Product specification
FBL22041
3.3V BTL 7-bit Futurebus+ transceiver (standard A-port)
1998 Aug 12
9
AC ELECTRICAL CHARACTERISTICS
(Commercial)
A PORT LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
T
amb
= +25
°
C, V
= 3.3V,
L
= 50pF, R
L
= 500
MIN
TYP
4.2
4.1
5.1
5.8
2.7
4.5
3.9
3.7
4.8
0.8
0.6
1.1
T
amb
= 0 to 70
°
C,
V
= 3.3V
±
10%,
C
L
= 50pF, R
L
= 500
MIN
3.9
3.9
5.4
2.5
3.6
3.3
0.7
0.5
UNIT
MAX
6.2
6.1
8.5
8.0
6.5
6.0
2.8
1.7
MAX
7.0
6.8
9.4
8.5
7.0
7.3
3.0
2.0
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
TLH
t
THL
Propagation delay,
Bn to AOn
Output enable time,
OEA to AOn
Output disable time,
OEA to AOn
Transition time, AOn Port
(10% to 90% or 90% to 10%)
Output skew between receivers
in same package
1
Waveform 1, 2
5.2
ns
Waveform 4, 5
7.1
ns
Waveform 4, 5
5.2
ns
Test Circuit and
Waveforms
1.6
ns
t
SK
(o)
Waveform 3
0.4
1.5
1.5
ns
B PORT LIMITS
SYMBOL
PARAMETER
TEST CONDITION
T
amb
= +25
°
C, V
CC
= 3.3V,
C
D
= 30pF, R
U
= 9
T
amb
= 0 to 70
°
C,
V
CC
= 3.3V
±
10%,
C
D
U
= 9
2.9
2.7
3.5
3.2
3.8
2.6
1.2
0.4
UNIT
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
TLH
t
THL
Propagation delay,
AIn to Bn
Enable/disable time,
OEB0 to Bn
Enable/disable time,
OEB1 to Bn
Transition time, Bn Port
(1.3V to 1.8V)
Output skew between drivers in
same package
1
PARAMETER
Propagation delay,
AIn to Bn
Enable/disable time,
OEB0 to Bn
Enable/disable time,
OEB1 to Bn
Transition time, Bn Port
(1.3V to 1.8V)
Output skew between drivers in
same package
1
Waveform 1, 2
3.2
2.9
3.9
3.5
4.1
3.0
1.3
0.4
4.1
3.6
4.7
4.4
5.0
3.9
1.9
0.8
5.0
4.4
5.5
5.4
5.9
4.8
2.8
1.4
5.8
4.9
6.4
5.9
6.6
5.5
3.0
1.5
ns
Waveform 2
ns
Waveform 1
ns
Test Circuit and
Waveforms
ns
t
SK
(o)
Waveform 3
0.3
1.4
1.4
ns
SYMBOL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
TLH
t
THL
TEST CONDITION
R
U
= 16.5
4.1
3.6
4.7
4.4
5.0
3.9
1.9
0.8
R
U
= 16.5
2.9
2.6
3.5
3.2
3.8
2.6
1.2
0.4
UNIT
Waveform 1, 2
3.2
2.9
3.9
3.5
4.1
3.0
1.3
0.4
5.0
4.9
5.5
5.4
5.9
4.8
2.8
1.4
5.8
4.9
6.4
5.9
6.6
5.5
3.0
1.5
ns
Waveform 2
ns
Waveform 1
ns
Test Circuit and
Waveforms
ns
t
SK
(o)
Waveform 3
0.3
1.4
1.4
ns
NOTES:
1.
t
actual – t
actual
for any data input to output path compared to any other data input to output path where N and M are either LH or
HL. Skew times are valid only under same test conditions (temperature, V
CC
, loading, etc.).
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