PRODUCT SPECIFICATION
FAN53180
REV. 1.0.0 6/10/03
25
Since the FAN53180 turns off all of the phases (switches
inductors to ground), there is no ripple voltage present dur-
ing load release. Thus, you do not have to add headroom for
ripple, allowing your load release V
TRANREL
to be larger
than V
TRAN1
by that amount and still be meeting spec.
If V
TRAN1
and V
TRANREL
are less than the desired final
droop, this implies that capacitors can be removed. When
removing capacitors, make sure to check the output ripple
voltage as well to makesure it is still within spec.
LAYOUT AND COMPONENT PLACEMENT
The following guidelines are recommended for optimal
performance of a switching regulator in a PC system.
Key layout issues are illustrated in Figure 11.
General Recommendations
For good results, at least a four-layer PCB is
recommended. This should allow the needed versatility
for control circuitry interconnections with optimal
placement,power planes for ground, input, and output
power, and wide interconnection traces in the rest of the
power delivery current paths. Keep in mind that each
square unit of 1 ounce copper trace has a resistance of
~0.53 m
at room temperature.
Whenever high currents must be routed between PCB
layers, vias should be used liberally to create several
parallel current paths so that the resistance and inductance
introduced by these current paths is minimized and the via
current rating is not exceeded.
If critical signal lines (including the output voltage sense
lines of the FAN53180) must cross through power
circuitry, it is best if a signal ground plane can be
interposed between those signal lines and the traces of the
power circuitry. This serves as a shield to minimize noise
injection into the signals at the expense of making signal
ground a bit noisier.
An analog ground plane should be used around and under
the FAN53180 for referencing the components associated
with the controller to. This plane should be tied to the
nearest output decoupling capacitor ground and should
not tie to any other power circuitry to prevent power
currents from flowing in it.
The components around the FAN53180 should be located
close to the controller with short traces. The most
important traces to keep short and away from other traces
are the FB and CSSUM pins. Refer to Figure 11 for more
details on layout for the CSSUM node.
The output capacitors should be connected as closely as
possible to the load (or connector) that receives the power
(e.g., a microprocessor core). If the load is distributed, the
capacitors should also be distributed, and generally in
proportion to where the load tends to be more dynamic.
Avoid crossing any signal lines over the switching power
path loop, described below.
Power Circuitry
The switching power path should be routed on the PCB to
encompass the shortest possible length in order to
minimize radiated switching noise energy (i.e., EMI) and
conduction losses in the board. Failure to take proper
precautions often results in EMI problems for the entire
PC system as well as noise related operational problems
in the power converter control circuitry. The switching
power path is the loop formed by the current path through
the input capacitors and the power MOSFETs including
all interconnecting PCB traces and planes. The use of
short and wide interconnection traces is especially critical
in this path for two reasons: it minimizes the inductance in
the switching loop, which can cause high-energy ringing,
and it accommodates the high current demand with
minimal voltage loss.
Whenever a power dissipating component (e.g., a power
MOSFET) is soldered to a PCB, the liberal use of vias,
both directly on the mounting pad and immediately
surrounding it, is recommended. Two important reasons
for this are: improved current rating through the vias, and
improved thermal performance from vias extended to the
opposite side of the PCB where a plane can more readily
transfer the heat to the air. Make a mirror image of any
pad being used to heatsink the MOSFETs on the opposite
side of the PCB to achieve the best thermal dissipation to
the air around the board. To further improve thermal
performance, the largest possible pad area should be used.
Figure 11. Layout Recommendations
The output power path should also be routed to
encompass a short distance. The output power path is
formed by the current path through the inductor, the
output capacitors, and the load.
For best EMI containment, a solid power ground plane
should be used as one of the inner layers extending fully
under all the power components.