參數(shù)資料
型號(hào): FA3686V
英文描述: SMPS Controller
中文描述: 開關(guān)電源控制器
文件頁(yè)數(shù): 12/18頁(yè)
文件大?。?/td> 389K
代理商: FA3686V
FA3686V
12
I
Description of each circuit
1. Reference voltage circuit (V
REF
)
This circuit generates the reference voltage of 1.00V (ch1: ±1%;
ch2, 3: ±2%) compensated in temperature from V
CC
voltage,
and is connected to the non-inverting input of the error amplifier.
This voltage cannot be observed directly because an external
pin for this purpose is not provided.
2. Regulated voltage circuit (V
REG
)
This circuit generates 2.20V±1% based on the reference
voltage V
REF
, and is used as the power supply of the internal IC
circuits. This voltage is generated when the supply voltage,
V
CC
, is input. The V
REG
voltage also is used as a regulated
power supply for soft start and others. The output current for
external circuit should be within 1mA. A capacitor connected
between VREG pin and GND pin is necessary to stable the
V
REF
voltage (To determine capacitance, refer to recommended
operating conditions). The V
REG
voltage is regulated in V
CC
voltage of 2.4V or above.
3. Oscillator
The oscillator generates a triangular waveform by charging and
discharging the built-in capacitor. A desired oscillation
frequency can be set by the value of the resistor connected to
the RT pin (Fig. 1). The built-in capacitor voltage oscillates
between approximately 0.82V and 1.38V at fosc=500kHz (that
of ch1 and ch2 are slightly different) with almost the same
charging and discharging gradients (Fig. 2). You can set the
desired oscillation frequency by changing the gradients using
the resistor connected to the RT pin. (Large R
T
: low frequency,
small R
T
: high frequency) The oscillator waveform cannot be
observed from the outside because a pin for this purpose is not
provided. The RT pin voltage is approximately 1V DC in normal
operation. The oscillator output is connected to the PWM
comparator.
4. Error amplifier circuit
The error amplifiers 1, 2, 3 have inverting input pins of IN1
pin
(Pin 14), IN2
pin (Pin 4) and IN3
pin (Pin 2). The non-inverting
input is internally connected to the reference voltage V
REF
of the
error amplifier 1 (1.00V±1%; 25
C) and the error amplifiers 2, 3
(1.00V±2%; 25
C). The FB pins (Pin1, Pin15) are the output of
the error amplifiers. An external RC network is connected
between FB pin and IN
pin for gain and phase compensation
setting. The error amplifier 3 can be used for a series regulator.
Fig. 1
Fig. 2
12
OSC
R
T
R
T
R
T
value: small
R
T
value: large
0.82V
1.38V
+
14
15
3
13
IN1-
VREG
IN2-
FB2
FB1
Comp
Vout1
Vout2
R
NF
1
R
NF2
VREF
(1.0V)
R1
R2
R3
R4
4
2
1
R5
R6
R
NF3
FB3
Er.Amp.1
Er.Amp.2
Er.Amp.3
IN3-
Vout3
Fig. 3
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