Revision 10 1-23 Output Buffer Delays AC Test Loads Table 1-13 Output Buffer Delays Figure 1-15 AC Test Loads D To" />
參數(shù)資料
型號: EX256-TQG100I
廠商: Microsemi SoC
文件頁數(shù): 20/48頁
文件大?。?/td> 0K
描述: IC FPGA ANTIFUSE 12K 100-TQFP
標(biāo)準(zhǔn)包裝: 90
系列: EX
邏輯元件/單元數(shù): 512
輸入/輸出數(shù): 81
門數(shù): 12000
電源電壓: 2.3 V ~ 2.7 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-TQFP(14x14)
eX Family FPGAs
Revision 10
1-23
Output Buffer Delays
AC Test Loads
Table 1-13 Output Buffer Delays
Figure 1-15 AC Test Loads
D
To AC Test Loads (shown below)
PAD
E
TRIBUFF
GND
50%
Out
1.5 V
50%
1.5 V
En
GND
50%
Out
1.5 V
50%
10%
En
GND
50%
Out
GND
1.5 V
50%
90%
VOL
VCC
VOH
t
DLH
t
DHL
VOL
VCC
t
ENZL
t
ENLZ
VCC
VOH
t
ENZH
t
ENHZ
In
R to VCC for tPZL
R to GND for t
PHZ
R = 1 k
R to VCC for t
PLZ
R to GND for t
PHZ
R = 1 k
GND
35 pF
GND
35 pF
5 pF
To the output
under test
To the output
under test
To the output
under test
Load 1
(used to measure
propagation delay)
Load 2
(Used to measure enable delays)
Load 3
(Used to measure disable delays)
VCC
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