- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄4501 > EX128-PTQG100I (Microsemi SoC)IC FPGA ANTIFUSE 6K 100-TQFP PDF資料下載
參數(shù)資料
| 型號： | EX128-PTQG100I |
| 廠商： | Microsemi SoC |
| 文件頁數(shù)： | 6/48頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC FPGA ANTIFUSE 6K 100-TQFP |
| 標準包裝： | 90 |
| 系列： | EX |
| 邏輯元件/單元數(shù)： | 256 |
| 輸入/輸出數(shù)： | 70 |
| 門數(shù)： | 6000 |
| 電源電壓： | 2.3 V ~ 2.7 V |
| 安裝類型： | 表面貼裝 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-TQFP（14x14） |
第1頁第2頁第3頁第4頁第5頁當前第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁
eX FPGA Architecture and Characteristics
1-10
Revision 10
Boundary Scan Testing (BST)
All eX devices are IEEE 1149.1 compliant. eX devices offer superior diagnostic and testing capabilities by
providing Boundary Scan Testing (BST) and probing capabilities. These functions are controlled through
the special test pins (TMS, TDI, TCK, TDO and TRST). The functionality of each pin is defined by two
available modes: Dedicated and Flexible, and is described in Table 1-4. In the dedicated test mode, TCK,
TDI, and TDO are dedicated pins and cannot be used as regular I/Os. In flexible mode (default mode),
TMS should be set HIGH through a pull-up resistor of 10 k
. TMS can be pulled LOW to initiate the test
sequence.
Dedicated Test Mode
In Dedicated mode, all JTAG pins are reserved for BST; designers cannot use them as regular I/Os. An
internal pull-up resistor is automatically enabled on both TMS and TDI pins, and the TMS pin will function
as defined in the IEEE 1149.1 (JTAG) specification.
To select Dedicated mode, users need to reserve the JTAG pins in Microsemi's Designer software by
checking the Reserve JTAG box in the Device Selection Wizard (Figure 1-12). JTAG pins comply with
LVTTL/TTL I/O specification regardless of whether they are used as a user I/O or a JTAG I/O. Refer to
the "3.3 V LVTTL Electrical Specifications" section and "5.0 V TTL Electrical Specifications" section on
page 1-18 for detailed specifications.
Flexible Mode
In Flexible Mode, TDI, TCK and TDO may be used as either user I/Os or as JTAG input pins. The internal
resistors on the TMS and TDI pins are disabled in flexible JTAG mode, and an external 10 k
pull-
resistor to VCCI is required on the TMS pin.
To select the Flexible mode, users need to clear the check box for Reserve JTAG in the Device Selection
Wizard in Microsemi's Designer software. The functionality of TDI, TCK, and TDO pins is controlled by
the BST TAP controller. The TAP controller receives two control inputs, TMS and TCK. Upon power-up,
the TAP controller enters the Test-Logic-Reset state. In this state, TDI, TCK, and TDO function as user
I/Os. The TDI, TCK, and TDO pins are transformed from user I/Os into BST pins when the TMS pin is
LOW at the first rising edge of TCK. The TDI, TCK, and TDO pins return to user I/Os when TMS is held
HIGH for at least five TCK cycles.
Table 1-4 Boundary Scan Pin Functionality
Dedicated Test Mode
Flexible Mode
TCK, TDI, TDO are dedicated BST pins
TCK, TDI, TDO are flexible and may be used as I/Os
No need for pull-up resistor for TMS and TDI
Use a pull-up resistor of 10 k
on TMS
Figure 1-12 Device Selection Wizard
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M1A3P400-1FG484 | IC FPGA 1KB FLASH 400K 484-FBGA |
| A40MX04-PLG44I | IC FPGA MX SGL CHIP 6K 44-PLCC |
| A40MX04-1PLG44 | IC FPGA MX SGL CHIP 6K 44-PLCC |
| A40MX04-1PL44 | IC FPGA MX SGL CHIP 6K 44-PLCC |
| A40MX02-2PLG44I | IC FPGA MX SGL CHIP 3K 44-PLCC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EX128-PTQG100PP | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:eX Family FPGAs |
| EX128-PTQG64 | 功能描述:IC FPGA ANTIFUSE 6K 64-TQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:EX 標準包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
| EX128-PTQG64I | 功能描述:IC FPGA ANTIFUSE 6K 64-TQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:EX 標準包裝:90 系列:ProASIC3 LAB/CLB數(shù):- 邏輯元件/單元數(shù):- RAM 位總計:36864 輸入/輸出數(shù):157 門數(shù):250000 電源電壓:1.425 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 125°C 封裝/外殼:256-LBGA 供應(yīng)商設(shè)備封裝:256-FPBGA（17x17） |
| EX128-TQ100 | 功能描述:IC FPGA ANTIFUSE 6K 100-TQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:EX 標準包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
| EX128-TQ100A | 功能描述:IC FPGA ANTIFUSE 6K 100-TQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:EX 標準包裝:152 系列:IGLOO PLUS LAB/CLB數(shù):- 邏輯元件/單元數(shù):792 RAM 位總計:- 輸入/輸出數(shù):120 門數(shù):30000 電源電壓:1.14 V ~ 1.575 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 85°C 封裝/外殼:289-TFBGA，CSBGA 供應(yīng)商設(shè)備封裝:289-CSP（14x14） |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。