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參數(shù)資料
| 型號(hào)： | EVAL-SSM2517Z |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 3/16頁(yè) |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR SSM2517 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | * |
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Data Sheet
SSM2517
Rev. B | Page 11 of 16
3.5
0
2.5
5.0
OU
TP
U
T
P
O
W
E
R
(
W
)
SUPPLY VOLTAGE (V)
09
21
1-
0
27
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
RL = 4 + 15H
GAIN = 5V
SAMPLE RATE = 64×
(3.072MHz)
THD + N = 10%
THD + N = 1%
Figure 22. Maximum Output Power vs. Supply Voltage, Gain = 5 V,
RL = 4 Ω, fS = 64×
0
10
20
30
40
50
60
70
80
90
100
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
EF
F
IC
IE
N
C
Y
(
%
)
OUTPUT POWER (W)
RL = 8 + 33H
GAIN = 5V
SAMPLE RATE = 64×
(3.072MHz)
PVDD = 2.5V
PVDD = 3.6V
PVDD = 5V
09
21
1-
0
29
Figure 23. Efficiency vs. Output Power into 8 Ω, Gain = 5 V, fS = 64×
0
50
100
150
200
250
300
350
400
450
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
S
UP
P
L
Y
C
URRE
NT
(m
A)
OUTPUT POWER (W)
RL = 8 + 33H
GAIN = 5V
SAMPLE RATE = 64×
(3.072MHz)
09
21
1-
0
32
PVDD = 2.5V
PVDD = 3.6V
PVDD = 5V
Figure 24. Supply Current (H-Bridge) vs. Output Power into 8 Ω,
Gain = 5 V, fS = 64×
3.5
0
2.5
5.0
OU
TP
U
T
P
O
W
E
R
(
W
)
SUPPLY VOLTAGE (V)
09
21
1-
0
28
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
RL = 4 + 15H
GAIN = 5V
SAMPLE RATE = 128×
(6.144MHz)
THD + N = 10%
THD + N = 1%
Figure 25. Maximum Output Power vs. Supply Voltage, Gain = 5 V,
RL = 4 Ω, fS = 128×
0
10
20
30
40
50
60
70
80
90
100
0
0.
2
0.
4
0.
6
0.
8
1.
0
1.
2
1.
4
1.
6
1.
8
2.
0
2.
2
2.
4
2.
6
2.
8
3.
0
3.
4
3.
2
EF
F
IC
IEN
C
Y
(
%
)
OUTPUT POWER (W)
PVDD = 5V
PVDD = 3.6V
09
21
1-
0
31
RL = 4 + 15H
GAIN = 5V
SAMPLE RATE = 64×
(3.072MHz)
PVDD = 2.5V
Figure 26. Efficiency vs. Output Power into 4 Ω, Gain = 5 V, fS = 64×
0
100
200
300
400
500
600
700
800
0
0.5
1.0
1.5
2.0
2.5
3.0
S
UP
P
L
Y
C
URRE
NT
(m
A)
OUTPUT POWER (W)
RL = 4 + 15H
GAIN = 5V
SAMPLE RATE = 64×
(3.072MHz)
09
21
1-
0
36
PVDD = 2.5V
PVDD = 3.6V
PVDD = 5V
Figure 27. Supply Current (H-Bridge) vs. Output Power into 4 Ω,
Gain = 5 V, fS = 64×
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