參數(shù)資料
型號： EVAL-SSM2380Z
廠商： Analog Devices Inc
文件頁數(shù)： 11/32頁
文件大?。?/td> 0K
描述： BOARD EVALUATION FOR SSM2375
標準包裝： 1
放大器類型： D 類
輸出類型： 2 通道（立體聲）
在某負載時最大輸出功率 x 通道數(shù)量： 3.2W x 2 @ 4 歐姆
板類型： 完全填充
已用 IC / 零件： SSM2380
已供物品： 板
SSM2380
Rev. A | Page 19 of 32
APPLICATIONS INFORMATION
LAYOUT
As output power increases, care must be taken to lay out printed
circuit board (PCB) traces and wires properly among the amplifier,
load, and power supply. A good practice is to use short, wide
PCB tracks to decrease voltage drops and minimize inductance.
Ensure that track widths are at least 200 mil for every inch of
track length for lowest DCR, and use 1 oz or 2 oz copper PCB
traces to further reduce IR drops and inductance. A poor layout
increases voltage drops, consequently affecting efficiency. Use
large traces for the power supply inputs and amplifier outputs
to minimize losses due to parasitic trace resistance.
Proper grounding guidelines help to improve audio performance,
minimize crosstalk between channels, and prevent switching
noise from coupling into the audio signal. To maintain high
output swing and high peak output power, the PCB traces that
connect the output pins to the load, as well as the PCB traces to
the supply pins, should be as wide as possible to maintain the
minimum trace resistances. It is also recommended that a large
ground plane be used for minimum impedances.
In addition, good PCB layout isolates critical analog paths from
sources of high interference. High frequency circuits (analog and
digital) should be separated from low frequency circuits. Properly
designed multilayer PCBs can reduce EMI emissions and increase
immunity to the RF field by a factor of 10 or more compared with
double-sided boards. A multilayer board allows a complete layer
to be used for the ground plane, whereas the ground plane side
of a double-sided board is often disrupted by signal crossover.
If the system has separate analog and digital ground and power
planes, the analog ground plane should be directly beneath the
analog power plane, and, similarly, the digital ground plane should
be directly beneath the digital power plane. There should be no
overlap between analog and digital ground planes or between
analog and digital power planes.
INPUT CAPACITOR SELECTION
The SSM2380 does not require input coupling capacitors if the
input signal is biased from 1.0 V to VDD 1.0 V. Input capacitors
are required if the input signal is not biased within this recom-
mended input dc common-mode voltage range, if high-pass
filtering is needed, or if a single-ended source is used. If high-
pass filtering is needed at the input, the input capacitor and the
input resistor of the SSM2380 form a high-pass filter whose
corner frequency is determined by the following equation:
fC = 1/(2π × RIN × CIN)
The input capacitor can significantly affect the performance of
the circuit. Not using input capacitors degrades both the output
offset of the amplifier and the dc PSRR performance.
In I2C control mode, the input impedance changes depending on
the gain setting from Register R0 and Register R1 (LGAIN[5:0]
and RGAIN[5:0] bits). Table 10 shows the RIN value for each
PGA gain setting.
Table 10. Input Impedance for I2C Control Mode
LGAIN[5:0],
RGAIN[5:0]
Gain (dB)
RIN (kΩ)
101110
24.0
7.3
101101
23.5
7.7
101100
23.0
8.1
101011
22.5
8.5
101010
22.0
9.0
101001
21.5
9.5
101000
21.0
10.0
100111
20.5
10.5
100110
20.0
11.1
100101
19.5
11.7
100100
19.0
12.3
100011
18.5
12.9
100010
18.0
13.6
100001
17.5
14.3
100000
17.0
15.0
011111
16.5
15.8
011110
16.0
16.6
011101
15.5
17.4
011100
15.0
18.3
011011
14.5
19.2
011010
14.0
20.1
011001
13.5
21.1
011000
13.0
22.1
010111
12.5
23.1
010110
12.0
24.2
010101
11.5
25.3
010100
11.0
26.4
010011
10.5
27.6
010010
10.0
28.8
010001
9.5
30.0
010000
9.0
31.3
001111
8.5
32.6
001110
8.0
34.0
001101
7.5
35.3
001100
7.0
36.7
001011
6.5
38.1
001010
6.0
39.6
001001
5.5
41.1
001000
5.0
42.6
000111
4.5
44.1
000110
4.0
45.6
000101
3.5
47.1
000100
3.0
48.7
000011
2.5
50.3
000010
2.0
51.8
000001
1.5
53.4
000000
1.0
55.0
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