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參數(shù)資料
| 型號： | EVAL-ADV7181CLQEBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 15/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR ADV7181CLQ |
| 標準包裝： | 1 |
| 主要目的： | 視頻，視頻解碼器 |
| 已用 IC / 零件： | ADV7181CLQ |
| 已供物品： | 板 |
ADV7181C
Data Sheet
Rev. E | Page 4 of 20
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
AVDD = 3.15 V to 3.45 V, DVDD = 1.65 V to 2.0 V, DVDDIO = 3.0 V to 3.6 V, PVDD = 1.71 V to 1.89 V, nominal input range 1.6 V.
TMIN to TMAX = 40°C to +85°C, unless otherwise noted.
Table 1.
Parameter1, 2
Symbol
Test Conditions
Min
Typ
Max
Unit
STATIC PERFORMANCE3, 4
Resolution (Each ADC)
N
10
Bits
Integral Nonlinearity
INL
BSL at 27 MHz (10-bit level)
±0.6
±2.5
LSB
BSL at 54 MHz (10-bit level)
0.6/+0.7
LSB
BSL at 74 MHz (10-bit level)
±1.4
LSB
BSL at 110 MHz (8-bit level)
±0.9
LSB
Differential Nonlinearity
DNL
At 27 MHz (10-bit level)
0.2/+0.25
0.99/+2.5
LSB
At 54 MHz (10-bit level)
0.2/+0.25
LSB
At 74 MHz (10-bit level)
±0.9
LSB
At 110 MHz (8-bit level)
0.2/+1.5
LSB
DIGITAL INPUTS5
Input High Voltage6
VIH
2
V
HS_IN, VS_IN low trigger mode
0.7
V
Input Low Voltage7
VIL
0.8
V
HS_IN, VS_IN low trigger mode
0.3
V
Input Current
IIN
10
+10
A
Input Capacitance5
CIN
10
pF
DIGITAL OUTPUTS
Output High Voltage8
VOH
ISOURCE = 0.4 mA
2.4
V
Output Low Voltage8
VOL
ISINK = 3.2 mA
0.4
V
High Impedance Leakage Current
ILEAK
Pin 1
60
A
All other output pins
10
A
Output Capacitance5
COUT
20
pF
POWER REQUIREMENTS5
Digital Core Power Supply
DVDD
1.65
1.8
2
V
Digital I/O Power Supply
DVDDIO
3.0
3.3
3.6
V
PLL Power Supply
PVDD
1.71
1.8
1.89
V
Analog Power Supply
AVDD
3.15
3.3
3.45
V
Digital Core Supply Current
IDVDD
CVBS input sampling at 54 MHz
105
mA
Graphics RGB sampling at 75 MHz
90
mA
SCART RGB FB sampling at 54 MHz
106
mA
Digital I/O Supply Current
IDVDDIO
CVBS input sampling at 54 MHz
4
mA
Graphics RGB sampling at 75 MHz
38
mA
PLL Supply Current
IPVDD
CVBS input sampling at 54 MHz
11
mA
Graphics RGB sampling at 75 MHz
12
mA
Analog Supply Current9
IAVDD
CVBS input sampling at 54 MHz
99
mA
Graphics RGB sampling at 75 MHz
166
mA
SCART RGB FB sampling at 54 MHz
200
mA
Power-Down Current
IPWRDN
2.25
mA
Green Mode Power-Down
IPWRDNG
Synchronization bypass function
16
mA
Power-Up Time
TPWRUP
20
ms
1 The minimum/maximum specifications are guaranteed over this range.
2 All specifications are obtained using the Analog Devices, Inc., recommended programming scripts.
3 All ADC linearity tests performed at input range of full scale – 12.5%, and at zero scale + 12.5%.
4 Maximum INL and DNL specifications obtained with part configured for component video input.
5 Guaranteed by characterization.
6 To obtain specified V
IH level on Pin 22, program Register 0x13 (WO) with a value of 0x04. If Register 0x13 is programmed with a value of 0x00, then VIH on Pin 22 is 1.2 V.
7 To obtain specified V
IL level on Pin 22, program Register 0x13 (WO) with a value of 0x04. If Register 0x13 is programmed with a value of 0x00, then VIL on Pin 22 is 0.4 V.
8 V
OH and VOL levels obtained using default drive strength value (0xD5) in Register Subaddress 0xF4.
9 For CVBS current measurement only, ADC0 is powered up. For RGB current measurements only, ADC0, ADC1, and ADC2 are powered up. For SCART FB current
measurements, all ADCs are powered up.
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