參數(shù)資料
型號： EVAL-AD9880-ABZ
廠商： Analog Devices Inc
文件頁數(shù)： 43/64頁
文件大?。?/td> 0K
描述： KIT MODULE VIDEO INPUT AD9880
標(biāo)準(zhǔn)包裝： 1
主要目的： 視頻，視頻處理
嵌入式： 否
已用 IC / 零件： AD9880
主要屬性： HDMI 接收器和模擬接口
次要屬性： 3 路 8 位 150MSPS ADC
已供物品： 板
AD9880
Rev. 0 | Page 48 of 64
Table 71. DVI Hsync Polarity Detect
Detect
Result
0
DVI Hsync polarity is low active
1
DVI Hsync polarity is high active
0x30
4
DVI Vsync Polarity
This read-only bit indicates the polarity of the DVI
Vsync.
Table 72. DVI Vsync Polarity Detect
Detect
Result
0
DVI Vsync polarity is low active
1
DVI Vsync polarity is high active
0x30
3-0
HDMI Pixel Repetition
These read-only bits indicate the pixel repetition on
DVI. 0 = 1×, 1 = 2×, 2 = 3×, up to a maximum
repetition of 10× (0x9).
Table 73.
Select
Repetition Multiplier
0000
1×
0001
2×
0010
3×
0011
4×
0100
5×
0101
6×
0110
7×
0111
8×
1000
9×
1001
10×
MACROVISION
0x31
7-4
Macrovision Pulse Max
These bits set the pseudo sync pulse width maximum
for Macrovision detection in pixel clocks. This is
functional for 13.5 MHz SDTV or 27 MHz progressive
scan. Power up default is 9.
0x31
3-0
Macrovision Pulse Min
These bits set the pseudo sync pulse width maximum
for Macrovision detection in pixel clocks. This is
functional for 13.5 MHz SDTV or 27 MHz progressive
scan. Power up default is 6.
0x32
7
Macrovision Oversample Enable
Tells the Macrovision detection engine whether we are
oversampling or not. This accommodates 27 MHz
sampling for SDTV and 54 MHz sampling for
progressive scan and is used as a correction factor for
clock counts. Power up default is 0.
0x32
6
Macrovision PAL Enable
Tells the Macrovision detection engine to enter PAL
mode when set to 1. Default is 0 for NTSC mode.
0x32
5-0
Macrovision Line Count Start
Sets the start line for Macrovision detection. Along
with Register 0x33, Bits [5:0] they define the region
where MV pulses are expected to occur. The power-up
default is Line 13.
0x33
7
Macrovision Detect Mode
0 = standard definition
1 = progressive scan mode
0x33
6
Macrovision Settings Override
This defines whether preset values are used for the
MV line counts and pulse widths or the values stored
in I2C registers.
0 = use hard coded settings for line counts and pulse
widths
1 = use I2C values for these settings
0x33
5-0
Macrovision Line Count End
Sets the end line for Macrovision detection. Along
with Register 0x32, Bits [5:0] they define the region
where MV pulses are expected to occur. The power up
default is Line 21.
0x34
7-6
Macrovision Pulse Limit Select
Sets the number of pulses required in the last three
lines (SD mode only). If there is not at least this
number of MV pulses, the engine stops. These two
bits define the following pulse counts:
00 = 6
01 = 4
10 = 5 (default)
11 = 7
0x34
5
Low Frequency Mode
Sets whether the audio PLL is in low frequency mode
or not. Low frequency mode should only be set for
pixel clocks < 80 MHz.
0x34
4
Low Frequency Override
Allows the previous bit to be used to set low frequency
mode rather than the internal autodetect.
0x34
3
Up Conversion Mode
0 = repeat Cb/Cr values
1 = interpolate Cb/Cr values
0x34
2
CbCr Filter Enable
Enables the FIR filter for 4:2:2 CbCr output.
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