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參數(shù)資料
| 型號： | EVAL-AD7663CBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 11/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVALUATION FOR AD7663 |
| 標準包裝： | 1 |
| 系列： | PulSAR® |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 250k |
| 數(shù)據(jù)接口： | 串行，并聯(lián) |
| 輸入范圍： | ±4 REF |
| 在以下條件下的電源（標準）： | 35mW @ 250kSPS |
| 工作溫度： | -40°C ~ 85°C |
| 已用 IC / 零件： | AD7663 |
| 已供物品： | 板，CD |
| 相關(guān)產(chǎn)品： | AD7663ACPZ-ND - IC ADC 16BIT CMOS 5V 48LFCSP AD7663ACPZRL-ND - IC ADC 16BIT CMOS 5V 48LFCSP AD7663ASTZRL-ND - IC ADC 16BIT CMOS 48-LQFP T/R AD7663ASTZ-ND - IC ADC 16BIT CMOS 48-LQFP |
REV. B
AD7663
–19–
CS
SCLK
SDOUT
D15
D14
D1
D0
D13
X15
X14
X13
X1
X0
Y15
Y14
BUSY
SDIN
INVSCLK = 0
t35
t36 t37
t31
t32
t16
t33
t34
X15
X14
X
12
3
14
15
16
17
18
EXT/
INT = 1
RD = 0
Figure 19. Slave Serial Data Timing for Reading (Read after Convert)
SLAVE SERIAL INTERFACE
External Clock
The AD7663 is configured to accept an externally supplied
serial data clock on the SCLK pin when the EXT/
INT pin is
held HIGH. In this mode, several methods can be used to read
the data. The external serial clock is gated by
CS and the data
are output when both
CS and RD are LOW. Thus, depending
on
CS, the data can be read after each conversion or during the
following conversion. The external clock can be either a continu-
ous or discontinuous clock. A discontinuous clock can be either
normally high or normally low when inactive. Figures 19 and 21
show the detailed timing diagrams of these methods.
While the AD7663 is performing a bit decision, it is important
that voltage transients not occur on digital input/output pins or
degradation of the conversion result could occur. This is par-
ticularly important during the second half of the conversion
phase because the AD7663 provides error correction circuitry
that can correct for an improper bit decision made during the first
half of the conversion phase. For this reason, it is recommended
that when an external clock is being provided, it is a discontinuous
clock that is toggling only when BUSY is LOW or, more
importantly, that does not transition during the latter half of
BUSY HIGH.
External Discontinuous Clock Data Read after Conversion
This mode is the most recommended of the serial slave modes.
Figure 19 shows the detailed timing diagrams of this method.
After a conversion is complete, indicated by BUSY returning
LOW, the result of this conversion can be read while both
CS and
RD are LOW. The data is shifted out, MSB first, with 16 clock
pulses and is valid on both the rising and falling edge of the clock.
Among the advantages of this method, the conversion performance
is not degraded because there are no voltage transients on the
digital interface during the conversion process.
Another advantage is to be able to read the data at any speed up
to 40 MHz, which accommodates both slow digital host interface
and the fastest serial reading.
Finally, in this mode only, the AD7663 provides a “daisy-chain”
feature using the RDC/SDIN input pin for cascading multiple
converters together. This feature is useful for reducing component
count and wiring connections when desired as, for instance, in
isolated multiconverter applications.
An example of the concatenation of two devices is shown in
Figure 20. Simultaneous sampling is possible by using a com-
mon
CNVST signal. It should be noted that the RDC/SDIN
input is latched on the opposite edge of SCLK of the one used
to shift out the data on SDOUT. Therefore, the MSB of the
“upstream” converter just follows the LSB of the “downstream”
converter on the next SCLK cycle.
CNVST
CS
SCLK
SDOUT
RDC/SDIN
BUSY
DATA
OUT
AD7663
#1
(DOWNSTREAM)
BUSY
OUT
CNVST
CS
SCLK
AD7663
#2
(UPSTREAM)
RDC/SDIN
SDOUT
SCLK IN
CS IN
CNVST IN
Figure 20. Two AD7663s in a Daisy-Chain Configuration
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| EVAL-AD7663EDZ | 制造商:Analog Devices 功能描述:CONVERTER - ADC |
| EVAL-AD7664CB | 制造商:Analog Devices 功能描述:Evaluation Kit For 16-Bit, 570 KSP Pulsar Unipolar CMOS ADC |
| EVAL-AD7664CBZ | 功能描述:BOARD EVALUATION FOR AD7664 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:PulSAR® 產(chǎn)品培訓模塊:Obsolescence Mitigation Program 標準包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標準）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
| EVAL-AD7665CB | 制造商:AD 制造商全稱:Analog Devices 功能描述:Evaluation Board AD766X/AD767X |
| EVAL-AD7665CBZ | 功能描述:BOARD EVALUATION FOR AD7665 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:PulSAR® 產(chǎn)品培訓模塊:Obsolescence Mitigation Program 標準包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標準）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
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