參數(shù)資料
型號(hào)： EV-ADF4360-7EB1Z
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 23/28頁(yè)
文件大?。?/td> 0K
描述： BOARD EVAL FOR ADF4360-7
標(biāo)準(zhǔn)包裝： 1
主要目的： 計(jì)時(shí)，頻率合成器
嵌入式： 否
已用 IC / 零件： ADF4360-7
主要屬性： 帶 VCO 的單路整數(shù)-N PLL
次要屬性： 900MHz，200kHz PFD
已供物品： 板，纜線，CD
ADF4360-7
Data Sheet
Rev. D | Page 4 of 28
Parameter
B Version
Unit
Conditions/Comments
RF OUTPUT CHARACTERISTICS5
Maximum VCO Output Frequency
1800
MHz
ICORE = 5 mA. Depending on L. See the Choosing the Correct
Minimum VCO Output Frequency
350
MHz
VCO Output Frequency
490/585
MHz min/max
section for other frequency values.
VCO Frequency Range
1.2
Ratio
FMAX/FMIN
VCO Sensitivity
12
MHz/V typ
section for other sensitivity values.
Lock Time6
400
s typ
To within 10 Hz of final frequency.
Frequency Pushing (Open Loop)
6
MHz/V typ
Frequency Pulling (Open Loop)
15
kHz typ
Into 2.00 VSWR load.
Harmonic Content (Second)
19
dBc typ
Harmonic Content (Third)
9
dBc typ
Output Power5, 7
14/5
dBm typ
Programmable in 3 dB steps. See Table 7.
Output Power Variation
±3
dB typ
For tuned loads, see Output Matching section.
VCO Tuning Range
1.25/2.5
V min/max
NOISE CHARACTERISTIC5
VCO Phase-Noise Performance8
116
dBc/Hz typ
@ 100 kHz offset from carrier.
138
dBc/Hz typ
@ 1 MHz offset from carrier.
144
dBc/Hz typ
@ 3 MHz offset from carrier.
148
dBc/Hz typ
@ 10 MHz offset from carrier.
Synthesizer Phase-Noise Floor9
172
dBc/Hz typ
@ 25 kHz PFD frequency.
163
dBc/Hz typ
@ 200 kHz PFD frequency.
147
dBc/Hz typ
@ 8 MHz PFD frequency.
In-Band Phase Noise10, 11
92
dBc/Hz typ
@ 1 kHz offset from carrier.
RMS Integrated Phase Error12
0.3
Degrees typ
100 Hz to 100 kHz.
Spurious Signals due to PFD Fre-
quency11, 13
70
dBc typ
Level of Unlocked Signal with
MTLD Enabled
44
dBm typ
1
Operating temperature range is –40°C to +85°C.
2
Guaranteed by design. Sample tested to ensure compliance.
3
ICP is internally modified to maintain constant loop gain over the frequency range.
4
TA = 25°C; AVDD = DVDD = VVCO = 3.3 V; P = 32.
5
Unless otherwise stated, these characteristics are guaranteed for VCO core power = 5 mA. L1, L2 = 13 nH, 470 resistors to GND in parallel with L1, L2.
6
Jumping from 490 MHz to 585 MHz. PFD frequency = 200 kHz; loop bandwidth = 10 kHz.
7
Using 50 resistors to VVCO, into a 50 load. For tuned loads, see the Output Matching section.
8
The noise of the VCO is measured in open-loop conditions.
9
The synthesizer phase-noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 log N (where N is the N divider value).
10
The phase noise is measured with the EV-ADF4360-xEB1 Evaluation Board and the HP 8562E Spectrum Analyzer. The Spectrum Analyzer provides the REFIN for the
synthesizer; offset frequency = 1 kHz.
11
fREFIN = 10 MHz; fPFD = 200 kHz; N = 2500; loop B/W = 10 kHz.
12
fREFIN = 10 MHz; fPFD = 1 MHz; N = 500; loop B/W = 25 kHz.
13
The spurious signals are measured with the EV-ADF4360-xEB1 Evaluation Board and the HP 8562E Spectrum Analyzer. The Spectrum Analyzer provides the REFIN for
the synthesizer; fREFOUT = 10 MHz @ 0 dBm.
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