參數(shù)資料
型號(hào): EPM9320ALI84-10
文件頁數(shù): 22/42頁
文件大?。?/td> 489K
代理商: EPM9320ALI84-10
Altera Corporation
29
MAX 9000 Programmable Logic Device Family Data Sheet
Tables 18 through 21 show timing for MAX 9000 devices.
Table 18. MAX 9000 External Timing Characteristics
Symbol
Parameter
Conditions
Speed Grade
Unit
-10
-15
-20
Min
Max
Min
Max
Min
Max
tPD1
Row I/O pin input to row I/O
pin output
C1 = 35 pF (2)
10.0
15.0
20.0
ns
tPD2
Column I/O pin input to
column I/O pin output
C1 = 35 pF
EPM9320A
10.8
ns
EPM9320
16.0
23.0
ns
EPM9400
16.2
23.2
ns
EPM9480
16.4
23.4
ns
EPM9560A
11.4
ns
EPM9560
16.6
23.6
ns
tFSU
Global clock setup time for I/O
cell
3.0
5.0
6.0
ns
t FH
Global clock hold time for I/O
cell
0.0
ns
t FCO
Global clock to I/O cell output
delay
C1 = 35 pF
1.0 (3)
4.8
1.0 (3)
7.0
1.0 (3)
8.5
ns
t CNT
Minimum internal global clock
period
6.9
8.5
10.0
ns
fCNT
Maximum internal global clock
frequency
144.9
117.6
100.0
MHz
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