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| 型號： | EPM7032BLC44-3 |
| 廠商： | Altera |
| 文件頁數(shù)： | 25/66頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MAX 7000 CPLD 32 44-PLCC |
| 標(biāo)準(zhǔn)包裝： | 130 |
| 系列： | MAX® 7000B |
| 可編程類型： | 系統(tǒng)內(nèi)可編程 |
| 最大延遲時(shí)間 tpd(1)： | 3.5ns |
| 電壓電源 - 內(nèi)部： | 2.375 V ~ 2.625 V |
| 邏輯元件/邏輯塊數(shù)目： | 2 |
| 宏單元數(shù)： | 32 |
| 門數(shù)： | 600 |
| 輸入/輸出數(shù)： | 36 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 44-PLCC（16.58x16.58） |
| 包裝： | 管件 |
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Altera Corporation
31
MAX 7000B Programmable Logic Device Data Sheet
Notes to tables:
(1)
(2)
Minimum DC input voltage is –0.5 V. During transitions, the inputs may undershoot to –2.0 V or overshoot to 4.6 V
for input currents less than 100 mA and periods shorter than 20 ns.
(3)
All pins, including dedicated inputs, I/O pins, and JTAG pins, may be driven before VCCINT and VCCIO are
powered.
(4)
These values are specified under the Recommended Operating Conditions in Table 15 on page 29.
(5)
The parameter is measured with 50% of the outputs each sourcing the specified current. The IOH parameter refers
to high-level TTL or CMOS output current.
(6)
The parameter is measured with 50% of the outputs each sinking the specified current. The IOL parameter refers to
low-level TTL or CMOS output current.
(7)
This value is specified for normal device operation. During power-up, the maximum leakage current is ±300 μA.
(8)
This pull-up exists while devices are being programmed in-system and in unprogrammed devices during
power-up. The pull-up resistor is from the pins to VCCIO.
(9)
Capacitance is measured at 25° C and is sample-tested only. Two of the dedicated input pins (OE1 and GCLRN) have
a maximum capacitance of 15 pF.
(10) The POR time for all 7000B devices does not exceed 100 μs. The sufficient VCCINT voltage level for POR is 2.375 V.
The device is fully initialized within the POR time after VCCINT reaches the sufficient POR voltage level.
(11) These devices support in-system programming for –40° to 100° C. For in-system programming support between
–40° and 0° C, contact Altera Applications.
Table 17. MAX 7000B Device Capacitance
Symbol
Parameter
Conditions
Min
Max
Unit
CIN
Input pin capacitance
VIN = 0 V, f = 1.0 MHz
8pF
CI/O
I/O pin capacitance
VOUT = 0 V, f = 1.0 MHz
8pF
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